More ramtest stuff

Makefile

@@ -35,13 +35,17 @@ obj/util.o: obj util.c
 	cc65 util.c $(cflags) -o obj/util.s
 	ca65 obj/util.s -o obj/util.o
 
+obj/ramtest.o: obj ramtest.c
+	cc65 ramtest.c $(cflags) -o obj/ramtest.s
+	ca65 obj/ramtest.s -o obj/ramtest.o
+
 obj/gwconio.o: obj gwconio.s
 	ca65 gwconio.s -o obj/gwconio.o
 
-bin/main.sys: bin obj/main.o obj/ram2e.o obj/ram2gs.o obj/ram2gs_asm.o obj/util.o obj/gwconio.o
+bin/main.sys: bin obj/main.o obj/ram2e.o obj/ram2gs.o obj/ram2gs_asm.o obj/util.o obj/ramtest.o obj/gwconio.o
 	ld65 -o bin/main.sys obj/main.o obj/ram2gs.o obj/ram2e.o obj/ram2gs_asm.o obj/util.o obj/gwconio.o -C apple2-system.cfg --lib apple2.lib -D __EXEHDR__=0
 
-bin/main.dbg.sys: bin obj/main.o obj/ram2e.dbg.o obj/ram2gs.dbg.o obj/ram2gs_asm.o obj/util.o obj/gwconio.o
+bin/main.dbg.sys: bin obj/main.o obj/ram2e.dbg.o obj/ram2gs.dbg.o obj/ram2gs_asm.o obj/util.o obj/ramtest.o obj/gwconio.o
 	ld65 -o bin/main.dbg.sys obj/main.o obj/ram2gs.dbg.o obj/ram2e.dbg.o obj/ram2gs_asm.o obj/util.o obj/gwconio.o -C apple2-system.cfg --lib apple2.lib -D __EXEHDR__=0
 
 GWRAM.po: bin/main.sys

gsram_asm.s

@@ -36,7 +36,7 @@
       .I16
 .endmacro
 
-.segment	"CODE"
+.code
 
 .proc _gsram_getsize: near
 .A8

ramtest.c

@@ -9,12 +9,49 @@
 #include "gwconio.h"
 #include "ramtestpat.c"
 
-#define TEST_SIZE 8*1024*1024
+#define TEST_SIZE (8*1024*1024)
+#define BANK_SIZE (65536)
+#define NUM_BANKS (TEST_SIZE/BANK_SIZE)
+
+static char getpat(uint32_t i) {
+	return ramtestpat[i % RAMTESTPAT_SIZE];
+}
 
 char test_run() {
-	// Put copy stub in low RAM 
+	uint32_t i;
-	for (uint32_t a = 0; a < TEST_SIZE) {
+	uint8_t ah;
-		wr(a, getpat(a));
+
+	// Put read/write stubs in low RAM
+
+
+	for (ah = 0, i = 0; ah < NUM_BANKS; ah++) {
+		uint16_t al = 0;
+
+		// Copy 0x0000-01FF
+		*((char*)_test_wr1_dm1 + 1) = getpat(i);
+		for (; al < 0x200; al++, i++) {
+			_test_wr1_dm1:
+			__asm__("lda #$00");
+			__asm__("sta $C009"); // SETALTZP
+			_test_wr1_am1:
+			__asm__("lda $0000");
+			__asm__("sta $C008"); // SETSTDZP
+		}
+
+		// Copy 0x0200-BFFF
+		for (; al < 0xC000; al++, i++) {
+
+		}
+
+		// Copy 0xC000-CFFF to LC2 D000-DFFF
+		for (; al < 0xD000; al++, i++) {
+
+		}
+
+		// Copy 0xD000-FFFF to LC1 D000-FFFF
+		for (; al != 0x0000; al++, i++) {
+
+		}
 	}
 
 	for (uint32_t a = 0; a < TEST_SIZE) {
@@ -25,47 +62,42 @@ char test_run() {
 	return 0;
 }
 
-static inline char getpat(uint32_t a) {
+static void rd_zplc() {
-	return ramtestpat[a % RAMTESTPAT_SIZE];
+	_rd_zplc:
+	__asm__("sta $C009"); // SETALTZP
+	_rd_zplc_am1:
+	__asm__("lda $0000");
+	__asm__("sta $C008"); // SETSTDZP
+	__asm__("rts");
 }
 
-static char rd(uint32_t a) {
+static void rd_main() {
-	uint16_t al = a & 0xFFFF;
+	_rd_main:
-	if (al < 0x0200) { return rd_zplc(a); }
+	__asm__("sta $C003"); // WRCARDRAM
-	else if (al < 0xC000) { return rd_mid(a); }
+	_rd_main_am1:
-	else if (al < 0xD000) { return rd_lc2(a); }
+	__asm__("lda $0000");
-	else { return rd_zplc(a); }
+	__asm__("sta $C002"); // WRMAINRAM
+	__asm__("rts");
 }
 
-static char rd_zplc(uint32_t a) {
+static void wr_zplc() {
-	
+	_wr_zplc:
+	_wr_zplc_dm1:
+	__asm__("lda #$00");
+	__asm__("sta $C009"); // SETALTZP
+	_wr_zplc_am1:
+	__asm__("lda $0000");
+	__asm__("sta $C008"); // SETSTDZP
+	__asm__("rts");
 }
 
-static char rd_mid(uint32_t a) {
+static void wr_main() {
-	
+	_wr_main:
+	_wr_zplc_dm1:
+	__asm__("lda #$00");
+	__asm__("sta $C005"); // WRCARDRAM
+	_wr_main_am1:
+	__asm__("lda $0000");
+	__asm__("sta $C004"); // WRMAINRAM
+	__asm__("rts");
 }
-
-static char rd_lc2(uint32_t a) {
-	
-}
-
-static char wr(uint32_t a, char d) {
-	uint16_t al = a & 0xFFFF;
-	if (al < 0x0200) { wr_zplc(a, d); }
-	else if (al < 0xC000) { wr_mid(a, d); }
-	else if (al < 0xD000) { wr_lc2(a, d); }
-	else { wr_zplc(a, d); }
-}
-
-static char rd_zplc(uint32_t a) {
-	
-}
-
-static char rd_mid(uint32_t a) {
-	
-}
-
-static char rd_lc2(uint32_t a) {
-	
-}
-

ramtest.s

@@ -0,0 +1,190 @@
+.autoimport on
+.importzp	sp
+
+.export rtst_run
+.import rtst_pat
+.import rtst_scratch
+
+.code
+
+.proc ramtest_run: near
+	; Preamble
+	php					; Push status
+	sei					; Disable interrupts
+	phx					; Push X
+	phy					; Push Y
+
+	; Save entire ZP
+	ldx #0				; X = 0
+	savezp:
+	lda $00,X
+	sta rtst_scratch,X
+	inx
+	bne savezp
+
+	; Set bank counter and address to 0
+	lda #0
+	sta $04
+	sta $03
+	sta $02
+
+	; Set pattern address to 0xA000
+	lda #$A0
+	sta $01
+	lda #$00
+	sta $00
+
+	bankloop:
+	; Store 0x0000-01FF
+
+	; Store 0x0200-BFFF
+
+	; Switch to LC2
+
+	; Store in 0xD000-DFFF
+
+	; Switch to LC1
+
+	; Store in 0xD000-FFFF
+
+	; Increment bank and repeat if < 128
+	inc $04
+	lda $04
+	cmp #$80
+	blt bankloop
+
+	; Restore entire ZP
+	ldx #0				; X = 0
+	savezp:
+	lda rtst_scratch,X
+	sta $00,X
+	inx
+	bne savezp
+
+	; Postamble
+	ply					; Pull Y
+	plx					; Pull X
+	plp					; Pull status
+.endproc
+
+.proc ramtest_incpat: near
+	; Increment pattern pointer
+	inc $00				; Increment low byte
+	bne incpat1			; If low byte nonzero, skip incrementing high byte
+	inc $01				; If low byte zero, increment high byte
+	bne incpat2			; Unconditional branch to return
+	beq incpat2
+
+	; Check if pointer == 0xB001
+	; if low byte didn't roll around 
+	incpat1:	
+	lda $01				; Load high byte of pointer
+	cmp #$B0			; Check == 0xB0
+	bne incpat2			; If not, goto return
+	lda $00				; Load low byte of pointer
+	cmp #$01			; Check == 0x01
+	bne incpat2			; If not, goto return
+	; Otherwise fall through
+
+	; Reset pattern pointer
+	lda #$A0
+	sta $01
+	lda #$00
+	sta $00
+
+	incpat2:
+	rts
+.endproc
+
+.proc ramtest_wr256zp: near
+	; Set up to copy
+	ldy $02				; Y = address lo
+	sty wr256zp_am1_1+1	; Set 1st address lo = 0
+	sty wr256zp_am1_2+1	; Set 2nd address lo = 0
+	ldy $03				; Y = address hi
+	sty wr256zp_am1_1+2	; Set 1st address hi
+	sty wr256zp_am1_2+2	; Set 2nd address hi
+	ldy #0				; Y = 0
+
+	wr256zp_loop:
+	; Load two pattern bytes
+	lda ($00)			; A = next pattern byte
+	jsr ramtest_incpat	; Increment pattern pointer
+	ldx ($00)			; Y = next pattern byte
+	jsr ramtest_incpat	; Increment pattern pointer
+	; Switch into ALTZP, store two pattern bytes, switch back
+	sta $C009			; SETALTZP
+	wr256zp_am1_1:
+	sta $0000,Y			; Store in RAM
+	iny					; Y++
+	wr256zp_am1_2:
+	stx $0000,Y			; Store in RAM
+	iny					; Y++
+	sta $C008			; SETSTDZP
+	; Repeat
+	bne wr256zp_loop	; Repeat until X rolls over (256 times)
+
+	; Success exit
+	rts
+.endproc
+
+.proc ramtest_wr256mn: near
+	; Set up to copy
+	ldy $02				; Y = address lo
+	sty wr256zp_am1_1+1	; Set 1st address lo
+	sty wr256zp_am1_2+1	; Set 2nd address lo
+	ldy $03				; Y = address hi
+	sty wr256zp_am1_1+2	; Set 1st address hi
+	sty wr256zp_am1_2+2	; Set 2nd address hi
+	ldy #0				; Y = 0
+
+	wr256mn_loop:
+	; Load two pattern bytes
+	lda ($00)			; A = next pattern byte
+	jsr ramtest_incpat	; Increment pattern pointer
+	ldx ($00)			; Y = next pattern byte
+	jsr ramtest_incpat	; Increment pattern pointer
+	; RAMWRTON, store two pattern bytes, RAMWRTOFF
+	sta $C009			; RAMWRTON
+	wr256mn_am1_1:
+	sta $0000,Y			; Store in RAM
+	iny					; X++
+	wr256mn_am1_2:
+	stx $0000,Y			; Store in RAM
+	iny					; X++
+	sta $C008			; RAMWRTOFF
+	; Repeat
+	bne wr256mn_loop	; Repeat until X rolls over (256 times)
+
+	; Success exit
+	rts
+.endproc
+
+.proc ramtest_vfy256zp: near
+	; Set up to verify
+	ldx #0				; X = 0
+	stx vfy256zp_am1+1	; Address lo = 0
+	sty vfy256zp_am1+2	; Address hi = Y
+	ldy #0				; Y = 0
+
+	vfy256zp_loop:
+	; Switch into ALTZP, load byte from RAM, switch back
+	sta $C009			; SETALTZP
+	vfy256zp_am1:
+	lda $0000,X			; A = next RAM byte
+	sta $C008			; SETSTDZP
+	; Compare loaded byte from RAM with pattern
+	cmp ($00),Y			; Compare with pattern byte
+	bne vfy256zp_vfail
+	jsr ramtest_incpat	; Increment pattern pointer
+	inx
+	; Repeat
+	bne vfy256zp_loop	; Repeat until X rolls over (256 times)
+
+	; Success exit
+	rts
+	; Fail exit
+	vfy256zp_vfail:
+	lda #$FF
+	rts
+.endproc