works as long as AppleShare is disabled...boot into BASIC, then set normal speed (1.0 MHz) & hit Ctrl-Reset before running executable
git-svn-id: https://svn.salfter.gotdns.org/svn/a2bfc/trunk@82 1b90f75b-8b96-4784-87c0-14078182fce6
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								1wire.s
									
									
									
									
									
								
							
							
						
						
									
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							| @@ -1,60 +0,0 @@ | ||||
| ; system-independent 1-Wire routines | ||||
|  | ||||
| 	.export _1wire_writebit | ||||
| 	.export _1wire_writebyte | ||||
| 	.export _1wire_readbit | ||||
| 	.export	_1wire_readbyte | ||||
| 	.export _1wire_reset | ||||
|  | ||||
| ; provided by system-specific routines at link time | ||||
|  | ||||
| 	.import	_1wire_send1_impl | ||||
| 	.import	_1wire_send0_impl | ||||
| 	.import	_1wire_read_impl | ||||
| 	.import	_1wire_reset_impl | ||||
|  | ||||
| ; some system-specific routines can be passed through | ||||
|  | ||||
| _1wire_send1	:=	_1wire_send1_impl | ||||
| _1wire_send0	:=	_1wire_send0_impl | ||||
| _1wire_reset	:=	_1wire_reset_impl | ||||
|  | ||||
| ; read a bit from the 1-Wire bus | ||||
|  | ||||
| _1wire_readbit: | ||||
| 	jsr	_1wire_read_impl | ||||
| 	ldx	#0 | ||||
| 	rts | ||||
|  | ||||
| ; write a bit to the 1-Wire bus | ||||
|  | ||||
| _1wire_writebit: | ||||
| 	ror		;shift out of LSB | ||||
| 	bcs	:+ | ||||
| 	jmp	_1wire_send0 | ||||
| :	jmp	_1wire_send1 | ||||
|  | ||||
| ; write a byte to the 1-Wire bus | ||||
|  | ||||
| _1wire_writebyte: | ||||
| 	ldx	#8 | ||||
| :	pha		;LSB is written first | ||||
| 	jsr	_1wire_writebit | ||||
| 	pla | ||||
| 	ror		;shift bit just sent out | ||||
| 	dex | ||||
| 	bne	:- | ||||
| 	rts | ||||
|  | ||||
| ; read a byte from the 1-Wire bus | ||||
|  | ||||
| _1wire_readbyte: | ||||
| 	ldx	#8 | ||||
| :	pha | ||||
| 	jsr	_1wire_read_impl | ||||
| 	ror | ||||
| 	pla | ||||
| 	ror | ||||
| 	dex | ||||
| 	bne :- | ||||
| 	rts | ||||
							
								
								
									
										
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							| @@ -0,0 +1,37 @@ | ||||
| FEATURES { | ||||
|     STARTADDRESS: default = $0800; | ||||
| } | ||||
| MEMORY { | ||||
|     ZP:     start = $0080, size = $001A,      define = yes; | ||||
|     HEADER: start = $0000, size = $0004,      file = ""; | ||||
|     RAM:    start = %S,    size = $9600 - %S, file = %O; | ||||
| } | ||||
| SEGMENTS { | ||||
|     EXEHDR:   load = HEADER, type = ro; | ||||
|     STARTUP:  load = RAM,    type = ro, define = yes; | ||||
|     LOWCODE:  load = RAM,    type = ro,               optional = yes; | ||||
|     INIT:     load = RAM,    type = ro, define = yes, optional = yes; | ||||
|     CODE:     load = RAM,    type = ro; | ||||
|     RODATA:   load = RAM,    type = ro; | ||||
|     DATA:     load = RAM,    type = rw; | ||||
|     BSS:      load = RAM,    type = bss, define = yes; | ||||
|     HEAP:     load = RAM,    type = bss, optional = yes; # must sit just below stack | ||||
|     ZEROPAGE: load = ZP,     type = zp; | ||||
| } | ||||
| FEATURES { | ||||
|     CONDES: segment = INIT, | ||||
| 	    type    = constructor, | ||||
| 	    label   = __CONSTRUCTOR_TABLE__, | ||||
| 	    count   = __CONSTRUCTOR_COUNT__; | ||||
|     CONDES: segment = RODATA, | ||||
| 	    type    = destructor, | ||||
| 	    label   = __DESTRUCTOR_TABLE__, | ||||
| 	    count   = __DESTRUCTOR_COUNT__; | ||||
|     CONDES: type    = interruptor, | ||||
| 	    segment = RODATA, | ||||
| 	    label   = __INTERRUPTOR_TABLE__, | ||||
| 	    count   = __INTERRUPTOR_COUNT__; | ||||
| } | ||||
| SYMBOLS { | ||||
|     __STACKSIZE__ = $800;	# 2K stack | ||||
| } | ||||
							
								
								
									
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							| @@ -0,0 +1,28 @@ | ||||
| #include <stdio.h> | ||||
| #include <conio.h> | ||||
| #include "ow.h" | ||||
| #include "ow-temp.h" | ||||
|  | ||||
| int main (void) | ||||
| { | ||||
|   unsigned char devid[8]={40,12,203,62,0,0,0,108}; | ||||
|  | ||||
|   // activate temperature sensor | ||||
|   if (ow_reset()) | ||||
|   { | ||||
|     printf("Error: 1-Wire bus disconnected\n"); | ||||
|     return -1; | ||||
|   } | ||||
|  | ||||
|   do | ||||
|   { | ||||
|     do | ||||
|     { | ||||
|       printf("%i deg F\n", ow_temp_read(devid, OW_TEMP_FAHRENHEIT)); | ||||
|     } | ||||
|     while (!kbhit()); | ||||
|   } | ||||
|   while (cgetc()!=3); | ||||
|  | ||||
|   return 0; | ||||
| } | ||||
| @@ -1,21 +1,22 @@ | ||||
| ; Apple II-specific 1-Wire routines
 | ||||
| 
 | ||||
| 	.export _1wire_send1_impl
 | ||||
| 	.export _1wire_send0_impl
 | ||||
| 	.export _1wire_read_impl
 | ||||
| 	.export _1wire_reset_impl
 | ||||
| 	.export _ow_send1_impl
 | ||||
| 	.export _ow_send0_impl
 | ||||
| 	.export _ow_read_impl
 | ||||
| 	.export _ow_reset_impl
 | ||||
| 	.export _ow_wait_impl
 | ||||
| 
 | ||||
| ; timing loops assume standard ~1 MHz speed for unaccelerated
 | ||||
| ; 8-bit Apple IIs
 | ||||
| 
 | ||||
| AN0	:=	$C059 | ||||
| AN0	:=	$C058 | ||||
| PB2	:=	$C063 | ||||
| 
 | ||||
| 	.code | ||||
| 
 | ||||
| ; send a 1 bit to the 1-Wire bus
 | ||||
| 
 | ||||
| _1wire_send1_impl: | ||||
| _ow_send1_impl: | ||||
| 	lda	AN0+1	;pull bus low for 6 us
 | ||||
| 	nop		;2 us to execute
 | ||||
| 	lda	AN0	;+4 us to execute=6 us
 | ||||
| @@ -27,7 +28,7 @@ _1wire_send1_impl: | ||||
| 
 | ||||
| ; send a 0 bit to the 1-Wire bus
 | ||||
| 
 | ||||
| _1wire_send0_impl: | ||||
| _ow_send0_impl: | ||||
| 	lda	AN0+1	;pull bus low for 60 us
 | ||||
| 	ldy	#13	;2 us
 | ||||
| :	dey		;2 us
 | ||||
| @@ -41,7 +42,7 @@ _1wire_send0_impl: | ||||
| 
 | ||||
| ; read a bit from the bus
 | ||||
| 
 | ||||
| _1wire_read_impl: | ||||
| _ow_read_impl: | ||||
| 	lda	AN0+1	;pull bus low for 6 us
 | ||||
| 	nop		;2 us
 | ||||
| 	lda	AN0	;+4 us=6 us
 | ||||
| @@ -58,13 +59,11 @@ _1wire_read_impl: | ||||
| :	dey | ||||
| 	bne	:- | ||||
| 	nop		;2+11*4+2=48 us
 | ||||
| 	lda	#0	;put result in register
 | ||||
| 	adc	#0 | ||||
| 	rts | ||||
| 	rts		;leave result in carry
 | ||||
| 
 | ||||
| ; reset 1-Wire bus; return 0 if devices are present, 1 if not
 | ||||
| 
 | ||||
| _1wire_reset_impl: | ||||
| _ow_reset_impl: | ||||
| 	lda	AN0+1	;pull bus low for 480 us
 | ||||
| 	ldy	#47	;2 us
 | ||||
| :	nop		;2 us
 | ||||
| @@ -93,7 +92,11 @@ _1wire_reset_impl: | ||||
| 	nop | ||||
| 	dey | ||||
| 	bne	:- | ||||
| 	lda	#0	;put result in register
 | ||||
| 	tax | ||||
| 	adc	#0 | ||||
| 	rts | ||||
| 
 | ||||
| ; wait for an active device to let go of the bus
 | ||||
| 
 | ||||
| _ow_wait_impl: | ||||
| :	bit	PB2 | ||||
| 	bpl	:- | ||||
| 	rts | ||||
							
								
								
									
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								ow-common.s
									
									
									
									
									
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							| @@ -0,0 +1,81 @@ | ||||
| ; system-independent 1-Wire routines | ||||
|  | ||||
| 	.export _ow_writebit | ||||
| 	.export _ow_writebyte | ||||
| 	.export _ow_readbit | ||||
| 	.export	_ow_readbyte | ||||
| 	.export _ow_reset | ||||
| 	.export _ow_wait | ||||
|  | ||||
| ; provided by system-specific routines at link time | ||||
|  | ||||
| 	.import	_ow_send1_impl | ||||
| 	.import	_ow_send0_impl | ||||
| 	.import	_ow_read_impl | ||||
| 	.import	_ow_reset_impl | ||||
| 	.import _ow_wait_impl | ||||
|  | ||||
| 	.bss | ||||
|  | ||||
| owtmp:	.res	1 | ||||
|  | ||||
| 	.code | ||||
|  | ||||
| ; some system-specific routines can be passed through | ||||
|  | ||||
| _ow_send1	:=	_ow_send1_impl | ||||
| _ow_send0	:=	_ow_send0_impl | ||||
| _ow_wait	:=	_ow_wait_impl | ||||
|  | ||||
| ; reset bus: return 0 if 1-Wire devices present, 1 otherwise | ||||
|  | ||||
| _ow_reset: | ||||
| 	jsr	_ow_reset_impl | ||||
| 	ldx	#0 | ||||
| 	txa | ||||
| 	adc	#0 | ||||
| 	rts | ||||
|  | ||||
| ; read a bit from the 1-Wire bus | ||||
|  | ||||
| _ow_readbit: | ||||
| 	jsr	_ow_read_impl | ||||
| 	ldx	#0 | ||||
| 	txa | ||||
| 	adc	#0 | ||||
| 	rts | ||||
|  | ||||
| ; write a bit to the 1-Wire bus | ||||
|  | ||||
| _ow_writebit: | ||||
| 	ror		;shift out of LSB | ||||
| 	bcs	:+ | ||||
| 	jmp	_ow_send0 | ||||
| :	jmp	_ow_send1 | ||||
|  | ||||
| ; write a byte to the 1-Wire bus | ||||
|  | ||||
| _ow_writebyte: | ||||
| 	sta	owtmp | ||||
| 	ldx	#8 | ||||
| :	ror	owtmp	;LSB is written first | ||||
| 	bcs	:+ | ||||
| 	jsr	_ow_send0 | ||||
| 	clc | ||||
| 	bcc	:++ | ||||
| :	jsr	_ow_send1 | ||||
| :	dex | ||||
| 	bne	:--- | ||||
| 	rts | ||||
|  | ||||
| ; read a byte from the 1-Wire bus | ||||
|  | ||||
| _ow_readbyte: | ||||
| 	ldx	#8 | ||||
| :	jsr	_ow_read_impl | ||||
| 	ror	owtmp | ||||
| 	dex | ||||
| 	bne	:- | ||||
| 	lda	owtmp | ||||
| 	ldx	#0 | ||||
| 	rts | ||||
							
								
								
									
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							| @@ -0,0 +1,30 @@ | ||||
| #include "ow-temp.h" | ||||
|  | ||||
| short ow_temp_read(unsigned char* devid, unsigned char format) | ||||
| { | ||||
|   unsigned char t1, t2; | ||||
|   short rawtemp; | ||||
|  | ||||
|   if (devid[0]!=40) | ||||
|     return OW_ERR_INVALIDDEVICE; | ||||
|   ow_selectdevice(devid); | ||||
|   ow_writebyte(68); // ask for a temperature reading | ||||
|   ow_wait(); // wait for operation to complete | ||||
|   ow_selectdevice(devid); | ||||
|   ow_writebyte(190); // retrieve the reading   | ||||
|   t1=ow_readbyte(); | ||||
|   t2=ow_readbyte(); | ||||
|   ow_reset(); | ||||
|    | ||||
|   rawtemp=(short)(t1+((int)t2<<8)); | ||||
|   switch (format) | ||||
|   { | ||||
|   case OW_TEMP_FAHRENHEIT: | ||||
|     return (rawtemp*9+8)/80+32; | ||||
|   case OW_TEMP_CELSIUS: | ||||
|     return (rawtemp+8)>>4; | ||||
|   case OW_TEMP_RAW: | ||||
|   default: | ||||
|     return rawtemp; | ||||
|   } | ||||
| } | ||||
							
								
								
									
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							| @@ -0,0 +1,16 @@ | ||||
| #ifndef OW_TEMP_H | ||||
| #define OW_TEMP_H | ||||
|  | ||||
| #include "ow.h" | ||||
|  | ||||
| // 1-Wire temperature sensor functions | ||||
|  | ||||
| short ow_temp_read(unsigned char* devid, unsigned char format); | ||||
|  | ||||
| // 1-Wire temperature sensor constants | ||||
|  | ||||
| #define OW_TEMP_RAW 0 | ||||
| #define OW_TEMP_FAHRENHEIT 1 | ||||
| #define OW_TEMP_CELSIUS 2 | ||||
|  | ||||
| #endif // OW_TEMP_H | ||||
							
								
								
									
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							| @@ -0,0 +1,16 @@ | ||||
| #include "ow.h" | ||||
|  | ||||
| void ow_selectdevice(unsigned char* devid) | ||||
| { | ||||
|   ow_reset(); | ||||
|   ow_writebyte(85); | ||||
|   ow_writebyte(devid[0]); | ||||
|   ow_writebyte(devid[1]); | ||||
|   ow_writebyte(devid[2]); | ||||
|   ow_writebyte(devid[3]); | ||||
|   ow_writebyte(devid[4]); | ||||
|   ow_writebyte(devid[5]); | ||||
|   ow_writebyte(devid[6]); | ||||
|   ow_writebyte(devid[7]); | ||||
|   return; | ||||
| } | ||||
							
								
								
									
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							| @@ -0,0 +1,21 @@ | ||||
| #ifndef OW_H | ||||
| #define OW_H | ||||
|  | ||||
| // common assembly-language routines in ow-common.s | ||||
|  | ||||
| void __fastcall__ ow_writebit(unsigned char data); | ||||
| void __fastcall__ ow_writebyte(unsigned char data); | ||||
| unsigned char __fastcall__ ow_readbit(void); | ||||
| unsigned char __fastcall__ ow_readbyte(void); | ||||
| unsigned char __fastcall__ ow_reset(void); | ||||
| void __fastcall__ ow_wait(void); | ||||
|  | ||||
| // common C routines in ow.c | ||||
|  | ||||
| void ow_selectdevice(unsigned char* devid); | ||||
|  | ||||
| // common 1-Wire constants | ||||
|  | ||||
| #define OW_ERR_INVALIDDEVICE -32767 | ||||
|  | ||||
| #endif // OW_H | ||||
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