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Non-working attempt at replacing the sampler with a UDB datapath (so I can use

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the FIFO).
This commit is contained in:
David Given
2019-02-24 14:50:33 +01:00
parent 649c571f81
commit 74c6c6db56
6 changed files with 93 additions and 11 deletions
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94
FluxEngine.cydsn/FluxEngine.cyprj
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@@ -2027,20 +2027,20 @@
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BIN
FluxEngine.cydsn/TopDesign/TopDesign.cysch
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FluxEngine.cydsn/UdbSampler/UdbSampler.cysym Normal file
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FluxEngine.cydsn/UdbSampler/UdbSampler.cyudb Normal file
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6
FluxEngine.cydsn/main.c
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@@ -250,7 +250,7 @@ static void init_capture_dma(void)
CyDmaTdSetConfiguration(td[i], BUFFER_SIZE, td[nexti],
CY_DMA_TD_INC_DST_ADR | CAPTURE_DMA__TD_TERMOUT_EN);
CyDmaTdSetAddress(td[i], LO16((uint32)&CAPTURE_REG_Status), LO16((uint32)&dma_buffer[i]));
CyDmaTdSetAddress(td[i], LO16((uint32)SAMPLER_Datapath_1_F0_PTR), LO16((uint32)&dma_buffer[i]));
}
}
@@ -261,7 +261,7 @@ static void cmd_read(struct read_frame* f)
/* Do slow setup *before* we go into the real-time bit. */
CAPTURE_RESET_Write(1);
SAMPLER_CONTROL_Write(1); /* reset */
wait_until_writeable(FLUXENGINE_DATA_IN_EP_NUM);
init_capture_dma();
@@ -276,7 +276,7 @@ static void cmd_read(struct read_frame* f)
dma_reading_from_td = -1;
dma_underrun = false;
int count = 0;
CAPTURE_RESET_Write(0);
SAMPLER_CONTROL_Write(0); /* !reset */
CyDmaChSetInitialTd(dma_channel, td[dma_writing_to_td]);
CyDmaClearPendingDrq(dma_channel);
CyDmaChEnable(dma_channel, 1);

4
protocol.h
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@@ -3,7 +3,7 @@
enum
{
FLUXENGINE_VERSION = 2,
FLUXENGINE_VERSION = 3,
FLUXENGINE_VID = 0x1209,
FLUXENGINE_PID = 0x6e00,
@@ -26,7 +26,7 @@ enum
SIDE_HIGHDENSITY = 0<<1,
FRAME_SIZE = 64,
TICK_FREQUENCY = 12000000,
TICK_FREQUENCY = 24000000,
TICKS_PER_US = TICK_FREQUENCY / 1000000,
TICKS_PER_MS = TICK_FREQUENCY / 1000,