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Add a feature where we can measure the FDD bus signal voltages using the PSoC's

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ADCs. Increase the track step pulse width to 6us, because.
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David Given
2019-12-10 22:36:18 +01:00
parent 8ee6eed4dc
commit f436d6b582
12 changed files with 841 additions and 305 deletions
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mkninja.sh
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@@ -212,6 +212,7 @@ buildlibrary libfrontend.a \
src/fe-scptoflux.cc \
src/fe-seek.cc \
src/fe-testbulktransport.cc \
src/fe-testvoltages.cc \
src/fe-upgradefluxfile.cc \
src/fe-writebrother.cc \
src/fe-writeflux.cc \