8 Commits

Author	SHA1	Message	Date
David Given	933ffe7ab4	Find and attempt to fix a memory corruption error when sampling --- if the next ... fragment arrives from the sampler before usbbuffer has finished being transmitted via USB, it'll get overwritten. I've disabled DMA USB to make the code easier to understand and made sure that we flush things more rigorously. This may help the weird pipe errors, too.	2020-01-27 21:40:27 +01:00
David Given	b448ab7917	Finally squeeze everything in to the Verilog sampler. It does seem to work ... better... the the USB hangup problem persists. Mac disks are still nigh-unreadable.	2019-12-12 00:12:20 +01:00
David Given	072a097003	Archival (non-functioning) checkin of Verilog-based sampler code. Sadly, we've ... run into size limits for the device, and I need to slim down.	2019-12-11 22:51:27 +01:00
David Given	08cb20fd1d	Remove the old, broken, Verilog sampler.	2019-02-27 23:57:13 +01:00
David Given	34a4c888b5	Rewrite the Verilog *again*, and increase the CPU clock rate --- it's now a ... little more reliable at reading long intervals off disk, but does seem to be doing it. I'm going to definitely need some better sampling logic here and probably a FIFO. But it'll do for now.	2019-02-23 19:51:27 +01:00
David Given	753a4a21ef	Rewrite the sampler Verilog to use much more consistent logic. Still doesn't ... work for long intervals, though.	2019-02-23 12:42:42 +01:00
David Given	6a1327e3f6	Attempt to translate the sequencer into Verilog and have it handle long ... intervals properly.	2019-02-23 00:50:36 +01:00
David Given	a77925fe64	Replace the complicated sampler with 10 lines of Verilog; the hardware should ... now be able to handle any length of transition. And it's simpler.	2019-02-22 20:01:34 +01:00