David Given 647862cdbd Update the firmware for the new cruncher.

2020-02-18 22:13:41 +01:00

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CortexM3/ARM_GCC_541/Release

Update the firmware for the new cruncher.

2020-02-18 22:13:41 +01:00

FIFOin

Typo fix. Make sure that both drives get deselected when the motor stops (to

2019-12-12 00:17:59 +01:00

FIFOout

Rework the output fifo to be a bit more correct about the sync signals, which

2020-02-17 00:13:13 +01:00

PulseGen

The UDB-based pulse generator is back. The problem was I was trying to write to

2019-02-27 23:34:55 +01:00

Sampler

Some verilog optimisations which shave off a few p-terms.

2020-02-15 12:15:51 +01:00

Sequencer

Non-functioning archive checkin: You can only have 120-odd DMA buffers, so my

2020-02-17 23:28:40 +01:00

SuperCounter

Archival (non-functioning) checkin of Verilog-based sampler code. Sadly, we've

2019-12-11 22:51:27 +01:00

TopDesign

So writing now works, but only if USB DMA is enabled. But that breaks reading.

2020-02-17 21:41:01 +01:00

cyapicallbacks.h

Initial project boilerplate.

2018-09-22 21:44:33 +02:00

FluxEngine.cydwr

Rework the output fifo to be a bit more correct about the sync signals, which

2020-02-17 00:13:13 +01:00

FluxEngine.cyprj

The bandwidth tester now tests bandwidth in both directions. It looks like my

2020-02-17 23:58:40 +01:00

main.c

Rename test bulktransport to test bandwidth; avoid watchdog failures while the

2020-02-18 19:12:52 +01:00

patcher.vbs

Finally figure out the secrets of WCID, so we don't need a signed driver to do

2018-09-26 00:37:19 +02:00