From 5fd2a484e59ed9c35644ba825c626ec5b1a61c05 Mon Sep 17 00:00:00 2001 From: Scott Alfter Date: Tue, 19 Aug 2025 08:17:41 -0700 Subject: [PATCH] . --- cputest/cputest.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cputest/cputest.v b/cputest/cputest.v index 8a6a768..fee6b12 100644 --- a/cputest/cputest.v +++ b/cputest/cputest.v @@ -1,6 +1,6 @@ `default_nettype none -`include "../verilog-6502/ALU.v" -`include "../verilog-6502/cpu.v" +//`include "../verilog-6502/ALU.v" +//`include "../verilog-6502/cpu.v" // look in pins.pcf for all the pin names on the TinyFPGA BX board module cputest (CLK, LED, USBPU);