Support new board V4 Slim

This commit is contained in:
Keir Fraser
2021-08-12 13:35:28 +01:00
parent 4102d57e97
commit ec553a0d4e
13 changed files with 151 additions and 47 deletions

19
inc/board.h Normal file
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@@ -0,0 +1,19 @@
/*
* board.h
*
* Board definitions
*
* Written & released by Keir Fraser <keir.xen@gmail.com>
*
* This is free and unencumbered software released into the public domain.
* See the file COPYING for more details, or visit <http://unlicense.org>.
*/
struct board_config {
uint8_t hse_mhz;
bool_t hse_byp;
bool_t hs_usb;
bool_t flippy;
const struct pin_mapping *user_pins;
const struct pin_mapping *msel_pins;
};

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@@ -30,6 +30,7 @@
#endif
#include "intrinsics.h"
#include "board.h"
#include "time.h"
#include "timer.h"
#include "usb.h"

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@@ -23,3 +23,20 @@ void early_fatal(int blinks) __attribute__((noreturn));
#define AHB_MHZ (SYSCLK_MHZ / 1) /* 144MHz */
#define APB1_MHZ (SYSCLK_MHZ / 2) /* 72MHz */
#define APB2_MHZ (SYSCLK_MHZ / 2) /* 72MHz */
enum {
F4SM_v4 = 0,
F4SM_v4_slim,
};
/* Core floppy pin assignments vary between F4 submodels (except INDEX, RDATA,
* and WDATA). All the following assignments are within GPIOB. */
struct core_floppy_pins {
uint8_t trk0;
uint8_t wrprot;
uint8_t dir;
uint8_t step;
uint8_t wgate;
uint8_t head;
};
extern const struct core_floppy_pins *core_floppy_pins;

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@@ -4,6 +4,7 @@
#define RCC_CFGR_PLLRANGE_GT72MHZ (1u<<31)
#define RCC_CFGR_PLLMUL_18 ((uint32_t)0x20040000)
#define RCC_CFGR_USBPSC_3 ((uint32_t)0x08400000)
#define RCC_CFGR_HSE_PREDIV2 (1u<<17)
#define RCC_CFGR_APB2PSC_2 (4u<<11)
#define RCC_CFGR_APB1PSC_2 (4u<< 8)

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@@ -69,12 +69,6 @@ enum {
F1SM_plus_unbuffered,
};
struct board_config {
bool_t flippy;
const struct pin_mapping *user_pins;
const struct pin_mapping *msel_pins;
};
/*
* Local variables:
* mode: C

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@@ -99,15 +99,6 @@ enum {
F7SM_v3,
};
struct board_config {
uint8_t hse_mhz;
bool_t hse_byp;
bool_t hs_usb;
bool_t flippy;
const struct pin_mapping *user_pins;
const struct pin_mapping *msel_pins;
};
void identify_board_config(void);
/* On reset, SYSCLK=HSI at 16MHz. SYSCLK runs at 2MHz. */