reimported PCB from EAGLE, started to replace symbols & footprints

This commit is contained in:
2025-10-17 13:30:01 -07:00
parent 084710ef1a
commit 1ec49c0a3a
3 changed files with 9260 additions and 8043 deletions

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@@ -6,7 +6,7 @@
"apply_defaults_to_fp_fields": false, "apply_defaults_to_fp_fields": false,
"apply_defaults_to_fp_shapes": false, "apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false, "apply_defaults_to_fp_text": false,
"board_outline_line_width": 0.15, "board_outline_line_width": 0.05,
"copper_line_width": 0.2, "copper_line_width": 0.2,
"copper_text_italic": false, "copper_text_italic": false,
"copper_text_size_h": 1.5, "copper_text_size_h": 1.5,
@@ -37,18 +37,18 @@
"other_text_thickness": 0.15, "other_text_thickness": 0.15,
"other_text_upright": false, "other_text_upright": false,
"pads": { "pads": {
"drill": 0.762, "drill": 0.8,
"height": 1.524, "height": 1.27,
"width": 1.524 "width": 2.54
}, },
"silk_line_width": 0.15, "silk_line_width": 0.1,
"silk_text_italic": false, "silk_text_italic": false,
"silk_text_size_h": 1.0, "silk_text_size_h": 1.0,
"silk_text_size_v": 1.0, "silk_text_size_v": 1.0,
"silk_text_thickness": 0.15, "silk_text_thickness": 0.1,
"silk_text_upright": false, "silk_text_upright": false,
"zones": { "zones": {
"min_clearance": 0.508 "min_clearance": 0.5
} }
}, },
"diff_pair_dimensions": [], "diff_pair_dimensions": [],
@@ -118,9 +118,9 @@
}, },
"rules": { "rules": {
"max_error": 0.005, "max_error": 0.005,
"min_clearance": 0.0, "min_clearance": 0.2032,
"min_connection": 0.0, "min_connection": 0.0,
"min_copper_edge_clearance": 0.075, "min_copper_edge_clearance": 0.025,
"min_groove_width": 0.0, "min_groove_width": 0.0,
"min_hole_clearance": 0.25, "min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25, "min_hole_to_hole": 0.25,
@@ -131,9 +131,9 @@
"min_text_height": 0.8, "min_text_height": 0.8,
"min_text_thickness": 0.08, "min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3, "min_through_hole_diameter": 0.3,
"min_track_width": 0.2, "min_track_width": 0.0,
"min_via_annular_width": 0.1, "min_via_annular_width": 0.1,
"min_via_diameter": 0.4, "min_via_diameter": 0.5,
"solder_mask_clearance": 0.0, "solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0, "solder_mask_min_width": 0.0,
"solder_mask_to_copper_clearance": 0.0, "solder_mask_to_copper_clearance": 0.0,
@@ -461,7 +461,7 @@
"classes": [ "classes": [
{ {
"bus_width": 12, "bus_width": 12,
"clearance": 0.2, "clearance": 0.2032,
"diff_pair_gap": 0.25, "diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25, "diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2, "diff_pair_width": 0.2,
@@ -472,9 +472,9 @@
"pcb_color": "rgba(0, 0, 0, 0.000)", "pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": -1, "priority": -1,
"schematic_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25, "track_width": 0.2,
"via_diameter": 0.8, "via_diameter": 0.6,
"via_drill": 0.4, "via_drill": 0.3,
"wire_width": 6 "wire_width": 6
} }
], ],
@@ -483,120 +483,7 @@
}, },
"net_colors": null, "net_colors": null,
"netclass_assignments": null, "netclass_assignments": null,
"netclass_patterns": [ "netclass_patterns": []
{
"netclass": "Default",
"pattern": "/A"
},
{
"netclass": "Default",
"pattern": "/B"
},
{
"netclass": "Default",
"pattern": "/COMP1"
},
{
"netclass": "Default",
"pattern": "/COMP2"
},
{
"netclass": "Default",
"pattern": "/SW1EN"
},
{
"netclass": "Default",
"pattern": "/SW2EN"
},
{
"netclass": "Default",
"pattern": "/USB_M"
},
{
"netclass": "Default",
"pattern": "/USB_P"
},
{
"netclass": "Default",
"pattern": "/VCC"
},
{
"netclass": "Default",
"pattern": "/VCC33"
},
{
"netclass": "Default",
"pattern": "/VCCIN"
},
{
"netclass": "Default",
"pattern": "/VREF"
},
{
"netclass": "Default",
"pattern": "GND"
},
{
"netclass": "Default",
"pattern": "Net-(AMP1-Pad1)"
},
{
"netclass": "Default",
"pattern": "Net-(AMP1-Pad2)"
},
{
"netclass": "Default",
"pattern": "Net-(AMP1-Pad6)"
},
{
"netclass": "Default",
"pattern": "Net-(AMP1-Pad7)"
},
{
"netclass": "Default",
"pattern": "Net-(R1-Pad2)"
},
{
"netclass": "Default",
"pattern": "Net-(R2-Pad2)"
},
{
"netclass": "Default",
"pattern": "Net-(USB1-Pad14)"
},
{
"netclass": "Default",
"pattern": "Net-(USB1-Pad17)"
},
{
"netclass": "Default",
"pattern": "Net-(USB1-Pad18)"
},
{
"netclass": "Default",
"pattern": "Net-(USB1-Pad19)"
},
{
"netclass": "Default",
"pattern": "Net-(USB1-Pad2)"
},
{
"netclass": "Default",
"pattern": "Net-(USB1-Pad20)"
},
{
"netclass": "Default",
"pattern": "Net-(USB1-Pad4)"
},
{
"netclass": "Default",
"pattern": "Net-(USB1-Pad5)"
},
{
"netclass": "Default",
"pattern": "Net-(USB1-Pad6)"
}
]
}, },
"pcbnew": { "pcbnew": {
"last_paths": { "last_paths": {

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