20 lines
575 B
Plaintext
20 lines
575 B
Plaintext
https://github.com/icebreaker-fpga/icebreaker
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SPI: QSPI-DDR-capable flash 128 MBit (16 MB)
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http://www.winbond.com/resource-files/w25q128jv_dtr%20revc%2003272018%20plus.pdf
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Fast Read Dual Output (3B) / Fast Read Dual IO (BB)
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Fast Read Quad Output (6B) / Fast Read Quad IO (EB) -> need the non-volatile Quad Enable bit (QE) to be set
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QPI mode (after "enter QPI" (38h) instruction) -> need the non-volatile Quad Enable bit (QE) to be set
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+ DTR
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En mode Quad IO: 8 cycles pour transmettre 32 bits, ou 4 cycles en DTR
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