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Remove pattern parameter (moved to outline file)

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This commit is contained in:
Shamil Yakupov
2016-02-04 16:24:14 +03:00
parent 08ee4b4dc3
commit ffbba64423
5 changed files with 1 additions and 5 deletions
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1
altera/5m1270zt144.yaml
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@@ -140,5 +140,4 @@ parts:
Power: VCCINT, GNDINT Power: VCCINT, GNDINT
housing: housing:
pattern: QFP
outline: JEDEC MS-026 BFB outline: JEDEC MS-026 BFB

1
ti/iso72x.yaml
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@@ -22,7 +22,6 @@ schematic:
housing: SOIC8 housing: SOIC8
SOIC8: SOIC8:
pattern: SOIC
outline: JEDEC MS-012 AA outline: JEDEC MS-012 AA
suffix: D, MD suffix: D, MD

1
ti/sn74lvc1g07dbv.yaml
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@@ -9,5 +9,4 @@ pinout:
NC: 1 NC: 1
housing: housing:
pattern: SOT
outline: JEDEC MO-178 AA outline: JEDEC MO-178 AA

1
ti/sn74lvc1g07dck.yaml
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@@ -2,5 +2,4 @@ name: SN74LVC1G07DCK
base: SN74LVC1G07DBV base: SN74LVC1G07DBV
housing: housing:
pattern: SOT
outline: JEDEC MO-203 AA outline: JEDEC MO-203 AA

2
ti/sn74lvc1g07drl.yaml
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@@ -2,7 +2,7 @@ name: SN74LVC1G07DRL
base: SN74LVC1G07DBV base: SN74LVC1G07DBV
housing: housing:
pattern: SOT pattern: SOT23
bodyWidth: 1.1-1.3 bodyWidth: 1.1-1.3
bodyLength: 1.5-1.7 bodyLength: 1.5-1.7
height: 0.5-0.6 height: 0.5-0.6