From 6e4b22823c98637f5e24c36025001abe0eced7f6 Mon Sep 17 00:00:00 2001 From: Scott Alfter Date: Wed, 13 Jul 2022 00:50:33 -0700 Subject: [PATCH] start backplane --- backplane/backplane.kicad_pcb | 1984 +++++++++++++++++ backplane/backplane.kicad_prl | 75 + backplane/backplane.kicad_pro | 454 ++++ backplane/backplane.kicad_sch | 3844 +++++++++++++++++++++++++++++++++ backplane/fp-info-cache | 1 + 5 files changed, 6358 insertions(+) create mode 100644 backplane/backplane.kicad_pcb create mode 100644 backplane/backplane.kicad_prl create mode 100644 backplane/backplane.kicad_pro create mode 100644 backplane/backplane.kicad_sch create mode 100644 backplane/fp-info-cache diff --git a/backplane/backplane.kicad_pcb b/backplane/backplane.kicad_pcb new file mode 100644 index 0000000..6513df6 --- /dev/null +++ b/backplane/backplane.kicad_pcb @@ -0,0 +1,1984 @@ +(kicad_pcb (version 20211014) (generator pcbnew) + + (general + (thickness 1.6) + ) + + (paper "A4") + (layers + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) + (50 "User.1" user) + (51 "User.2" user) + (52 "User.3" user) + (53 "User.4" user) + (54 "User.5" user) + (55 "User.6" user) + (56 "User.7" user) + (57 "User.8" user) + (58 "User.9" user) + ) + + (setup + (stackup + (layer "F.SilkS" (type "Top Silk Screen")) + (layer "F.Paste" (type "Top Solder Paste")) + (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) + (layer "F.Cu" (type "copper") (thickness 0.035)) + (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) + (layer "B.Cu" (type "copper") (thickness 0.035)) + (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) + (layer "B.Paste" (type "Bottom Solder Paste")) + (layer "B.SilkS" (type "Bottom Silk Screen")) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (aux_axis_origin 90 140) + (pcbplotparams + (layerselection 0x00010fc_ffffffff) + (disableapertmacros false) + (usegerberextensions false) + (usegerberattributes true) + (usegerberadvancedattributes true) + (creategerberjobfile true) + (svguseinch false) + (svgprecision 6) + (excludeedgelayer true) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (dxfpolygonmode true) + (dxfimperialunits true) + (dxfusepcbnewfont true) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (sketchpadsonfab false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + + (net 0 "") + (net 1 "A15") + (net 2 "A14") + (net 3 "A13") + (net 4 "A12") + (net 5 "A11") + (net 6 "A10") + (net 7 "A9") + (net 8 "A8") + (net 9 "A7") + (net 10 "A6") + (net 11 "A5") + (net 12 "A4") + (net 13 "A3") + (net 14 "A2") + (net 15 "A1") + (net 16 "A0") + (net 17 "GND") + (net 18 "5V") + (net 19 "~{M1}") + (net 20 "~{RESET}") + (net 21 "CLK") + (net 22 "~{INT}") + (net 23 "~{MREQ}") + (net 24 "~{WR}") + (net 25 "~{RD}") + (net 26 "~{IORQ}") + (net 27 "D0") + (net 28 "D1") + (net 29 "D2") + (net 30 "D3") + (net 31 "D4") + (net 32 "D5") + (net 33 "D6") + (net 34 "D7") + (net 35 "TX") + (net 36 "RX") + (net 37 "USR1") + (net 38 "USR2") + (net 39 "USR3") + (net 40 "~{RFSH}") + (net 41 "~{PAGE}") + (net 42 "CLK2") + (net 43 "~{BUSACK}") + (net 44 "~{HALT}") + (net 45 "~{BUSRQ}") + (net 46 "~{WAIT}") + (net 47 "~{NMI}") + (net 48 "unconnected-(J5-Pad30)") + (net 49 "unconnected-(J6-Pad30)") + + (footprint "Connector_PinSocket_2.54mm:PinSocket_1x39_P2.54mm_Vertical" (layer "F.Cu") + (tedit 5A19A42A) (tstamp 05b0d977-e744-453f-9055-26861e6ee2f2) + (at 174.615 41.91) + (descr "Through hole straight socket strip, 1x39, 2.54mm pitch, single row (from Kicad 4.0.7), script generated") + (tags "Through hole socket strip THT 1x39 2.54mm single row") + (property "Sheetfile" "backplane.kicad_sch") + (property "Sheetname" "") + (path "/f04fb87f-da96-4f4b-b5a2-622534723981") + (attr through_hole) + (fp_text reference "J4a1" (at 0 -2.77) (layer "F.SilkS") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp 905fbdb9-49d3-48b7-8ab8-518d2de1d5b2) + ) + (fp_text value "Conn_01x39_Female" (at 0 99.29) (layer "F.Fab") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp c5ce26d0-71f9-453b-bb37-758efe68316e) + ) + (fp_text user "${REFERENCE}" (at 0 48.26 90) (layer "F.Fab") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp f5863793-5bfc-47a9-a38b-5a232e540a39) + ) + (fp_line (start -1.33 1.27) (end -1.33 97.85) (layer "F.SilkS") (width 0.12) (tstamp 162f1c86-844f-4f8a-8d2c-98de3fb99414)) + (fp_line (start -1.33 97.85) (end 1.33 97.85) (layer "F.SilkS") (width 0.12) (tstamp 1bb96b11-9e68-4638-ae50-9f6ce923fe0d)) + (fp_line (start 1.33 -1.33) (end 1.33 0) (layer "F.SilkS") (width 0.12) (tstamp 495a8856-90c6-4f1e-828f-b5352d216fc6)) + (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer "F.SilkS") (width 0.12) (tstamp 600de340-f64a-4b22-b146-05668d4b0b9f)) + (fp_line (start 1.33 1.27) (end 1.33 97.85) (layer "F.SilkS") (width 0.12) (tstamp b5e4c618-87fd-4a8c-9cff-edf80de67f88)) + (fp_line (start 0 -1.33) (end 1.33 -1.33) (layer "F.SilkS") (width 0.12) (tstamp d9f0dd8b-f064-4570-bf07-7cd5be082295)) + (fp_line (start 1.75 98.3) (end -1.8 98.3) (layer "F.CrtYd") (width 0.05) (tstamp 30981f4f-0281-4de0-9887-cfbda6387d48)) + (fp_line (start -1.8 -1.8) (end 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