This commit is contained in:
Conor Patrick
2020-01-13 16:47:12 -05:00
parent b8c7c8d694
commit cfaf182c67
5 changed files with 647 additions and 577 deletions

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@@ -1,6 +1,29 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# AMS3953
#
DEF AMS3953 N 0 40 Y Y 1 F N
F0 "N" 650 150 50 H V C CNN
F1 "AMS3953" 300 150 50 H V C CNN
F2 "" 650 150 50 H I C CNN
F3 "" 650 150 50 H I C CNN
DRAW
S 0 0 800 -950 0 1 0 N
X VP_IO 1 900 -800 100 L 50 50 1 1 P
X IRQ 10 -100 -800 100 R 50 50 1 1 P
X VP_REG 2 900 -650 100 L 50 50 1 1 P
X LC1 3 900 -500 100 L 50 50 1 1 P
X LC2 4 900 -350 100 L 50 50 1 1 P
X VSS 5 900 -200 100 L 50 50 1 1 P
X SS 6 -100 -200 100 R 50 50 1 1 P
X SCLK 7 -100 -350 100 R 50 50 1 1 P
X MOSI 8 -100 -500 100 R 50 50 1 1 P
X MISO 9 -100 -650 100 R 50 50 1 1 P
X VSS2 EXP 400 -1050 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# AMS3956
#
DEF AMS3956 N 0 40 Y Y 1 F N
@@ -42,6 +65,28 @@ X SWO 6 550 100 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# AS3953-CSP
#
DEF AS3953-CSP N 0 40 Y Y 1 F N
F0 "N" 650 0 50 H V C CNN
F1 "AS3953-CSP" 300 0 50 H V C CNN
F2 "solo:AS3953_CSP" 500 -50 50 H I C CNN
F3 "" 500 -50 50 H I C CNN
DRAW
S 0 -100 800 -1050 1 1 0 N
X SS A1 -100 -300 100 R 50 50 1 1 P
X MOSI A2 -100 -600 100 R 50 50 1 1 P
X MISO A3 -100 -750 100 R 50 50 1 1 P
X IRQ A4 -100 -900 100 R 50 50 1 1 P
X SCLK B1 -100 -450 100 R 50 50 1 1 P
X LC2 B2 900 -450 100 L 50 50 1 1 P
X LC1 B3 900 -600 100 L 50 50 1 1 P
X VP_REG B4 900 -750 100 L 50 50 1 1 P
X VSS C1 900 -300 100 L 50 50 1 1 P
X VP_SPI C4 900 -900 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# AS3956-CSP
#
DEF AS3956-CSP N 0 40 Y Y 1 F N

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@@ -0,0 +1,34 @@
(module AS3953_CSP (layer F.Cu) (tedit 5DF511BC)
(descr "RFID TAG R/W 13.56MHZ INLAY")
(attr smd)
(fp_text reference BGA12N40P4X3_180X141X34N (at -0.1872 -1.3532) (layer F.SilkS)
(effects (font (size 0.32 0.32) (thickness 0.05)))
)
(fp_text value VAL** (at 0.016 1.3468) (layer F.SilkS)
(effects (font (size 0.32 0.32) (thickness 0.05)))
)
(fp_line (start -1.04 -0.42) (end -1.04 -0.84) (layer F.SilkS) (width 0.127))
(fp_line (start -1.04 -0.84) (end -0.62 -0.84) (layer F.SilkS) (width 0.127))
(fp_line (start 0.62 -0.84) (end 1.04 -0.84) (layer F.SilkS) (width 0.127))
(fp_line (start 1.04 -0.84) (end 1.04 -0.42) (layer F.SilkS) (width 0.127))
(fp_line (start -1.04 0.42) (end -1.04 0.84) (layer F.SilkS) (width 0.127))
(fp_line (start -1.04 0.84) (end -0.62 0.84) (layer F.SilkS) (width 0.127))
(fp_line (start 0.62 0.84) (end 1.04 0.84) (layer F.SilkS) (width 0.127))
(fp_line (start 1.04 0.84) (end 1.04 0.42) (layer F.SilkS) (width 0.127))
(fp_circle (center -1.36 -0.53) (end -1.31 -0.53) (layer F.SilkS) (width 0.1))
(pad A1 smd circle (at -0.6 -0.4) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(pad A2 smd circle (at -0.2 -0.2) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(pad A3 smd circle (at 0.2 -0.2) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(pad A4 smd circle (at 0.6 -0.4) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(pad B1 smd circle (at -0.6 0) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(pad C1 smd circle (at -0.6 0.4) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(pad B2 smd circle (at -0.2 0.2) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(pad B3 smd circle (at 0.2 0.2) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(pad B4 smd circle (at 0.6 0) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(pad C4 smd circle (at 0.6 0.4) (size 0.25 0.25) (layers F.Cu F.Paste F.Mask))
(model 3d/AS3956-CSP.step
(offset (xyz -0.9 -0.7 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@@ -200,25 +200,25 @@ X SWO 6 550 100 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# solo_AS3956-CSP
# solo_AS3953-CSP
#
DEF solo_AS3956-CSP N 0 40 Y Y 1 F N
DEF solo_AS3953-CSP N 0 40 Y Y 1 F N
F0 "N" 650 0 50 H V C CNN
F1 "solo_AS3956-CSP" 300 0 50 H V C CNN
F2 "solo:AS3956_CSP" 500 -50 50 H I C CNN
F1 "solo_AS3953-CSP" 300 0 50 H V C CNN
F2 "solo:AS3953_CSP" 500 -50 50 H I C CNN
F3 "" 500 -50 50 H I C CNN
DRAW
S 0 -100 800 -1050 1 1 0 N
X SS A1 -100 -300 100 R 50 50 1 1 P
X MOSI A2 -100 -600 100 R 50 50 1 1 P
X SCLK A3 -100 -450 100 R 50 50 1 1 P
X MISO A4 -100 -750 100 R 50 50 1 1 P
X VP_REG B1 900 -750 100 L 50 50 1 1 P
X IRQ B4 -100 -900 100 R 50 50 1 1 P
X MISO A3 -100 -750 100 R 50 50 1 1 P
X IRQ A4 -100 -900 100 R 50 50 1 1 P
X SCLK B1 -100 -450 100 R 50 50 1 1 P
X LC2 B2 900 -450 100 L 50 50 1 1 P
X LC1 B3 900 -600 100 L 50 50 1 1 P
X VP_REG B4 900 -750 100 L 50 50 1 1 P
X VSS C1 900 -300 100 L 50 50 1 1 P
X LC2 C2 900 -450 100 L 50 50 1 1 P
X LC1 C3 900 -600 100 L 50 50 1 1 P
X VP_IO C4 900 -900 100 L 50 50 1 1 P
X VP_SPI C4 900 -900 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#

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@@ -468,22 +468,6 @@ Wire Wire Line
5650 2900 5650 3200
Wire Wire Line
5650 3200 6700 3200
$Comp
L solo:AS3956-CSP N1
U 1 1 5DF6940D
P 4450 4550
F 0 "N1" H 4850 3335 50 0000 C CNN
F 1 "AS3956-CSP" H 4850 3426 50 0000 C CNN
F 2 "solo:AS3956_CSP" H 4950 4500 50 0001 C CNN
F 3 "AS3956-ATWT-I3" H 4950 4500 50 0001 C CNN
F 4 "ams" H 4450 4550 50 0001 C CNN "Manufacturer"
F 5 "RFID TAG R/W 13.56MHZ INLAY" H 4450 4550 50 0001 C CNN "Description"
F 6 "AS3956-ATWT-I3" H 4450 4550 50 0001 C CNN "MPN"
F 7 "12" H 4450 4550 50 0001 C CNN "Pins"
F 8 "CSP/BGA" H 4450 4550 50 0001 C CNN "Package"
1 4450 4550
-1 0 0 1
$EndComp
Wire Wire Line
1750 4100 1750 4050
Wire Wire Line
@@ -594,8 +578,6 @@ Connection ~ 9100 1550
Wire Wire Line
9400 1550 9450 1550
Connection ~ 9450 1550
Wire Wire Line
3950 3200 3900 3200
Text HLabel 8550 1550 0 50 Input ~ 0
CAP1
Text HLabel 9400 1550 0 50 Input ~ 0
@@ -1044,4 +1026,15 @@ F 8 "0201" H 9450 2450 50 0001 C CNN "Package"
1 9450 2450
1 0 0 -1
$EndComp
$Comp
L solo:AS3953-CSP N1
U 1 1 5E160F94
P 3650 3350
F 0 "N1" H 4050 3415 50 0000 C CNN
F 1 "AS3953-CSP" H 4050 3324 50 0000 C CNN
F 2 "solo:AS3953_CSP" H 4150 3300 50 0001 C CNN
F 3 "" H 4150 3300 50 0001 C CNN
1 3650 3350
1 0 0 -1
$EndComp
$EndSCHEMATC