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Converted PCB/Schematic to KiCad 7 format

Browse Source 
This converts PCB/Schematic files to KiCad 7 format. Converted by simply
opening the project and press save.

Signed-off-by: Stefan Agner <stefan@agner.ch>
This commit is contained in:
Stefan Agner
2023-04-06 14:41:46 +02:00
parent 35ae47b917
commit d2074201e9
14 changed files with 56621 additions and 48446 deletions
Download Patch File Download Diff File Expand all files Collapse all files

322
Yellow.kicad_pro
View File

@@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
@@ -106,20 +107,26 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "ignore",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
@@ -129,9 +136,14 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "ignore",
"silk_overlap": "ignore",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
@@ -140,7 +152,6 @@
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rules": {
@@ -148,18 +159,63 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.125,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.3,
"min_hole_clearance": 0.127,
"min_hole_to_hole": 0.254,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.19999999999999998,
"min_track_width": 0.125,
"min_via_annular_width": 0.125,
"min_via_diameter": 0.44999999999999996,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [
0.0,
0.127,
@@ -196,7 +252,8 @@
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
@@ -418,7 +475,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.127,
"diff_pair_gap": 0.127,
"diff_pair_via_gap": 0.25,
@@ -432,10 +489,10 @@
"track_width": 0.127,
"via_diameter": 0.45,
"via_drill": 0.2,
"wire_width": 5.0
"wire_width": 5
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.127,
"diff_pair_gap": 0.127,
"diff_pair_via_gap": 0.25,
@@ -444,33 +501,15 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "diff_100",
"nets": [
"/CM4/ETH.TD1+",
"/CM4/ETH.TD1-",
"/CM4/ETH.TD2+",
"/CM4/ETH.TD2-",
"/CM4/ETH.TD3+",
"/CM4/ETH.TD3-",
"/CM4/ETH.TD4+",
"/CM4/ETH.TD4-",
"/CM4/HDMI.CLK+",
"/CM4/HDMI.CLK-",
"/CM4/HDMI.D0+",
"/CM4/HDMI.D0-",
"/CM4/HDMI.D1+",
"/CM4/HDMI.D1-",
"/CM4/HDMI.D2+",
"/CM4/HDMI.D2-"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.154,
"via_diameter": 0.45,
"via_drill": 0.2,
"wire_width": 5.0
"wire_width": 5
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.127,
"diff_pair_gap": 0.127,
"diff_pair_via_gap": 0.25,
@@ -479,23 +518,15 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "diff_85",
"nets": [
"/CM4/PCIe.CLK+",
"/CM4/PCIe.CLK-",
"/CM4/PCIe.RX+",
"/CM4/PCIe.RX-",
"/CM4/PCIe.TX+",
"/CM4/PCIe.TX-"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.238,
"via_diameter": 0.45,
"via_drill": 0.2,
"wire_width": 5.0
"wire_width": 5
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.127,
"diff_pair_gap": 0.127,
"diff_pair_via_gap": 0.25,
@@ -504,31 +535,15 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "diff_90",
"nets": [
"/CM4/CM4_USB_D+",
"/CM4/CM4_USB_D-",
"/USB/CP.D+",
"/USB/CP.D-",
"/USB/HUB.D+",
"/USB/HUB.D-",
"/USB/OTG.D+",
"/USB/OTG.D-",
"/USB/USB-C.D+",
"/USB/USB-C.D-",
"/USB/USB0.D+",
"/USB/USB0.D-",
"/USB/USB1.D+",
"/USB/USB1.D-"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.206,
"via_diameter": 0.45,
"via_drill": 0.2,
"wire_width": 5.0
"wire_width": 5
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.8,
"diff_pair_gap": 0.0,
"diff_pair_via_gap": 0.25,
@@ -537,24 +552,15 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "poe_hv",
"nets": [
"/Ethernet/VC1",
"/Ethernet/VC2",
"/Ethernet/VC3",
"/Ethernet/VC4",
"/PoE/POE_IN_N",
"/PoE/POE_IN_P",
"ETH_SHLD"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 5.0
"wire_width": 5
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.0,
"diff_pair_via_gap": 0.25,
@@ -563,21 +569,197 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "sing_50",
"nets": [
"/802.15.4 Radio/RF_SIGNAL"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.293,
"via_diameter": 0.45,
"via_drill": 0.2,
"wire_width": 5.0
"wire_width": 5
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "diff_100",
"pattern": "/CM4/ETH.TD1+"
},
{
"netclass": "diff_100",
"pattern": "/CM4/ETH.TD1-"
},
{
"netclass": "diff_100",
"pattern": "/CM4/ETH.TD2+"
},
{
"netclass": "diff_100",
"pattern": "/CM4/ETH.TD2-"
},
{
"netclass": "diff_100",
"pattern": "/CM4/ETH.TD3+"
},
{
"netclass": "diff_100",
"pattern": "/CM4/ETH.TD3-"
},
{
"netclass": "diff_100",
"pattern": "/CM4/ETH.TD4+"
},
{
"netclass": "diff_100",
"pattern": "/CM4/ETH.TD4-"
},
{
"netclass": "diff_100",
"pattern": "/CM4/HDMI.CLK+"
},
{
"netclass": "diff_100",
"pattern": "/CM4/HDMI.CLK-"
},
{
"netclass": "diff_100",
"pattern": "/CM4/HDMI.D0+"
},
{
"netclass": "diff_100",
"pattern": "/CM4/HDMI.D0-"
},
{
"netclass": "diff_100",
"pattern": "/CM4/HDMI.D1+"
},
{
"netclass": "diff_100",
"pattern": "/CM4/HDMI.D1-"
},
{
"netclass": "diff_100",
"pattern": "/CM4/HDMI.D2+"
},
{
"netclass": "diff_100",
"pattern": "/CM4/HDMI.D2-"
},
{
"netclass": "diff_85",
"pattern": "/CM4/PCIe.CLK+"
},
{
"netclass": "diff_85",
"pattern": "/CM4/PCIe.CLK-"
},
{
"netclass": "diff_85",
"pattern": "/CM4/PCIe.RX+"
},
{
"netclass": "diff_85",
"pattern": "/CM4/PCIe.RX-"
},
{
"netclass": "diff_85",
"pattern": "/CM4/PCIe.TX+"
},
{
"netclass": "diff_85",
"pattern": "/CM4/PCIe.TX-"
},
{
"netclass": "diff_90",
"pattern": "/CM4/CM4_USB_D+"
},
{
"netclass": "diff_90",
"pattern": "/CM4/CM4_USB_D-"
},
{
"netclass": "diff_90",
"pattern": "/USB/CP.D+"
},
{
"netclass": "diff_90",
"pattern": "/USB/CP.D-"
},
{
"netclass": "diff_90",
"pattern": "/USB/HUB.D+"
},
{
"netclass": "diff_90",
"pattern": "/USB/HUB.D-"
},
{
"netclass": "diff_90",
"pattern": "/USB/OTG.D+"
},
{
"netclass": "diff_90",
"pattern": "/USB/OTG.D-"
},
{
"netclass": "diff_90",
"pattern": "/USB/USB-C.D+"
},
{
"netclass": "diff_90",
"pattern": "/USB/USB-C.D-"
},
{
"netclass": "diff_90",
"pattern": "/USB/USB0.D+"
},
{
"netclass": "diff_90",
"pattern": "/USB/USB0.D-"
},
{
"netclass": "diff_90",
"pattern": "/USB/USB1.D+"
},
{
"netclass": "diff_90",
"pattern": "/USB/USB1.D-"
},
{
"netclass": "poe_hv",
"pattern": "/Ethernet/VC1"
},
{
"netclass": "poe_hv",
"pattern": "/Ethernet/VC2"
},
{
"netclass": "poe_hv",
"pattern": "/Ethernet/VC3"
},
{
"netclass": "poe_hv",
"pattern": "/Ethernet/VC4"
},
{
"netclass": "poe_hv",
"pattern": "/PoE/POE_IN_N"
},
{
"netclass": "poe_hv",
"pattern": "/PoE/POE_IN_P"
},
{
"netclass": "poe_hv",
"pattern": "ETH_SHLD"
},
{
"netclass": "sing_50",
"pattern": "/802.15.4 Radio/RF_SIGNAL"
}
]
},
"pcbnew": {
"last_paths": {