Commit Graph

13 Commits

Author SHA1 Message Date
Dominik Sliwa
076bbdf181 initial rev 0.3:
updates
schematic:
-change usb current protection IC to 1.5A
-Added low-pass filter to the audio output
-PoE fixed primary windings polarity
-added option to select poe class with a jumper (between 3 and 4)
-fixes in poe design
-added testpoints
-added virtual hirose df40c connectors for pick and place use

lightblue.pretty:
-added fake DF40C footprint for pick and place and 3d model purposes

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-06-05 23:10:33 +02:00
Stefan Agner
fae11d7a77 Change footprint of C87/C91 to 1206
2.2uF/100V don't really exist in 0805 package. Use 1206 package for
those capacitors.

Fixes: #21

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-05-29 13:54:28 +02:00
Stefan Agner
d357365ab2 Clarify rating of C52/R53
C52 needs to be 100n/25V, R53 should be 1% accuracy.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-05-29 13:11:28 +02:00
Stefan Agner
c237fee832 Change rating of PoE capacitors to 2.2uF/25V
2.2uF/100V are not really available in a 0805 package. This part of
the PoE design a 25V rating is sufficent.

Fixes: #22

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-05-29 13:01:38 +02:00
Stefan Agner
1699c93e59 Update silkscreen/adjust reference designators
Order some relevant reference designator. Use JP for all jumpers. Place
silkcreen neatly. Add some custom silk screen. Remove heat sink corner
marks on silk screen.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-27 16:59:52 +02:00
Dominik Sliwa
b1e3c7e17c pcb 0.2:
Changes:
Footrints:
-Modified DC Jack to accomodate CUI PJ-002A
-Modified RJ45 to increase clearance between shield and poe pins
-Modified m.2 mounting pads to avoid drc errors
Schematic:
-usb-c facing usb mux is supplied by +3v3VP
-added misc. capacitors
PCB
-min. annular ring for vias set to 0.125 from 0.2

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-04-27 02:06:11 +02:00
Stefan Agner
11f79076eb Add footprint for Pulse PA2467NL transformer
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-16 16:22:34 +02:00
Stefan Agner
f12d8178a4 Add PG-TSDSON-8-1 package for Infineon BSZ440N10NS3
Add package for Infineon N-Channel MOSFET BSZ440N10NS3.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-16 15:59:26 +02:00
Stefan Agner
ffb1a161e1 Adjust rating/footprint size of some ceramic capacitors
Also update connector/jumper designator to make more sense.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-16 14:34:56 +02:00
Stefan Agner
e1079c97d4 Reannotate the complete schematics
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-16 00:22:28 +02:00
Stefan Agner
e2740025eb Adjust various parts to improve BOM
- Replace unusual/high value ceramics with lower value in parallel
- Use the same protection Shottky Diode in PoE as in regular input
  (B340LB-13-F)
- Replace PoE rectifier Diodes with B1100-13-F
- Replace PoE Inductor (SRN6045TA-3R3Y) with the same part from 5V power
  supply (Taiyo Yuden NRS8030T3R3MJGJ)
- Correctly specify Pulse Electronics transformer

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-15 23:52:59 +02:00
Stefan Agner
8382d3b79c Adjust Manufacturer/PartNumber for some parts
- Use Diodes B2100-13-F consistently
- Define part for pin headers
- Replace N-Channel MOSFET for PoE with BSZ440N10NS3GATMA1
- Define Input protection MOSFET DMP3013SFV-7

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-15 21:49:27 +02:00
Stefan Agner
d2b0064975 Use CamelCase style naming for all schematic files
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-15 20:44:58 +02:00