-Fixed upstream diff pair polarity
-added optional inverer for the USB power switch enable pin
Design now supports both AP2181 and AP2191
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
Run annotation again which just updated some net names. Address various
DRC issues like courtyard violence and exclude the remaining DRC errors.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- U7: Define Manufacturer/PartNumber
- J13: Define Manufacturer/PartNumber
- L2: Fix PartNumber (remove unprintable characters)
- C85: Change to our preferred supplier Nichicon
- J9: DNP (not used by default, avoid potential issues with FCC approval)
- Y1/Y2: Define frequency and load capacitance in value
- JP1: Use sensible part value
- C106: Fix Config field
- Remove heat sink and CM4 from BOM (handled in product assembly BOM)
Signed-off-by: Stefan Agner <stefan@agner.ch>
PoE
-Added a common mode filter on the input
-FB filter on the output side
-12V in now disables the poe with the DEN pin
-DT is now disabled
-PSRS is now disabled
-move to 1210 resistors for resistors identified in thermal testing
-DTHR is now enabled in default BoM
-some resistor values were adjusted
-some caps were moved to the common power supply section
USB:
-USB Hub 1.8V rail have capacitors added
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
Add BD9D321EFJ to the symbol library and align it properly to the
1.27mm/0.050inch grid. Make sure to align the instances U15/U16
correctly as well as the complete Power schematic.
With that GND is now correctly connected to Pin 5 of U16.
Fixes: #27
Signed-off-by: Stefan Agner <stefan@agner.ch>
updates
schematic:
-change usb current protection IC to 1.5A
-Added low-pass filter to the audio output
-PoE fixed primary windings polarity
-added option to select poe class with a jumper (between 3 and 4)
-fixes in poe design
-added testpoints
-added virtual hirose df40c connectors for pick and place use
lightblue.pretty:
-added fake DF40C footprint for pick and place and 3d model purposes
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
Changes:
Footrints:
-Modified DC Jack to accomodate CUI PJ-002A
-Modified RJ45 to increase clearance between shield and poe pins
-Modified m.2 mounting pads to avoid drc errors
Schematic:
-usb-c facing usb mux is supplied by +3v3VP
-added misc. capacitors
PCB
-min. annular ring for vias set to 0.125 from 0.2
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
- Replace unusual/high value ceramics with lower value in parallel
- Use the same protection Shottky Diode in PoE as in regular input
(B340LB-13-F)
- Replace PoE rectifier Diodes with B1100-13-F
- Replace PoE Inductor (SRN6045TA-3R3Y) with the same part from 5V power
supply (Taiyo Yuden NRS8030T3R3MJGJ)
- Correctly specify Pulse Electronics transformer
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Use Diodes B2100-13-F consistently
- Define part for pin headers
- Replace N-Channel MOSFET for PoE with BSZ440N10NS3GATMA1
- Define Input protection MOSFET DMP3013SFV-7
Signed-off-by: Stefan Agner <stefan@agner.ch>
The Rohm has a lower current rating and input voltage range, but should
be good enough for our use case. It has better availability and is quite
a bit cheaper than the Diodes part. This also requires different
inductors and some different resistor values.
Fixes: #12
Signed-off-by: Stefan Agner <stefan@agner.ch>
Add the CM4 board to board connectors using separate symbols. This is a
bit a hack, but makes sure two pieces appear in the BOM.
Also, this seems to upgrade all the schematic to the latest KiCad
schematic version.
Signed-off-by: Stefan Agner <stefan@agner.ch>
changes:
-more routing
-added poe negotiation disabled when +12V is present on the DC jack
-modified m.2 "holes"
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
- Fix footprint for 02x05 pin header
- Add footprint for Bourns SDR1006 Inductor (PoE)
- Define footprints for inductors
- Define footprints for ferrite beads
- Define footprint for fuse
- Define footprints for all resistors
- Define footprints for SD card and other components
- Switch ON Semi NCP114MX with TI TLV73333PDBV
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Moved PoE to a seperate sheet and finished design
- Started using Config field for Variants and DNP flag
- Fix-ups
- Added Wurth 749119550 and TI TPS23734 to the symbol library
- Changed RTC from PCF8563 to PCF85063
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added AP64501SP-13 library symbol
-Initial power supplies schematics
-Increased capacitance for PCIe socket
-Connections between sheets
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added net classes for controlled impedance traces
-Added power hierarchical sheet
-Initial USB subsystem schematic
-Added multiple bus definitions (usb, pcie, i2c etc.)
-Fixed busses use
-Added LDO for audio analog rails
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
