Commit Graph

41 Commits

Author SHA1 Message Date
Dominik Sliwa
9354729d76 Zone cleanup
Cleanup some fill zones.
Updated the Transformer symbol with pin 4, connected to +48V for better
zone fill.
fixed top/bottom transition for the DC_IN_F
Added some gnd vias

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2022-02-15 12:02:54 +01:00
Dominik Sliwa
8fd9133aec PoE EMI optimization
Modified PoE layout to account for GNDS-GND1 flow
and repositioned the noise retern capacitor.
Snubber was corrected for the transformer used and the switching
frequency. Some components were removed.
PoE Input filter was adjusted.

3.3 and 5V DCDC capacitor layout was optimised and unused components
were removed.

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2022-02-15 00:29:21 +01:00
Stefan Agner
8f5fade02a Various minor silk screen/PCB tweaks
- Fix edge cut on lower right corner to make board size exact
- Update board charactristics
- Set grid origin back to 30, 30
- Update M.2 expansion silk screen (remove AI accelerator hint)
- Various silk screen reference designator fixes/improvements
- Add ESD warning logo

Signed-off-by: Stefan Agner <stefan@agner.ch>
2022-01-10 11:19:45 +01:00
Stefan Agner
f4d8d9d038 Silkscreen fixes/small BOM adjustments
- Update silk screen reference designators
- Update backside silk screen for Yellow revision 1.1
- Set U21 (SOIC-8 RTC) to assemble and U25 (MSOP-8) as DNP
- Update heatsink footprint to add heatsink outline to silk screen (#44)
- Mark orientation of D26, D27, D28 and D29 (fixes #39)
- Use pin-header footprint for PoE selector J13, it is now JP5

Signed-off-by: Stefan Agner <stefan@agner.ch>
2022-01-09 22:18:52 +01:00
Dominik Sliwa
04ea9a070b Optimise PoE layout
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2022-01-09 12:11:04 +01:00
Stefan Agner
8c5d73b1fe Update PartNumber/Manufacturer
Fill in Manufacturer/PartNumber for the following parts:
- CP2102N-Axx-xQFN24
- FSUSB30MUX
- BC817

Signed-off-by: Stefan Agner <stefan@agner.ch>
2022-01-06 17:44:40 +01:00
Stefan Agner
019c9efdda Rename Amber to Yellow everywhere
Signed-off-by: Stefan Agner <stefan@agner.ch>
2022-01-06 17:08:55 +01:00
Dominik Sliwa
9ba4a31261 Fix FSUSB30 Symbol and routing
Additionally a cap was added to U27.

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2022-01-05 18:32:19 +01:00
Dominik Sliwa
7fe4e894df Yellow Proto1
Changes:
-name changed to yellow
-moved to 24-pin CP2102N
-routing

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-12-09 23:10:18 +01:00
Dominik Sliwa
2b6a425388 USB hub fixes
-Fixed upstream diff pair polarity
-added optional inverer for the USB power switch enable pin
 Design now supports both AP2181 and AP2191

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-10-30 19:22:03 +02:00
Stefan Agner
507a65182c Assign Manufacturer/PartNumbers and align parts to 1.27mm grid
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-10-08 17:06:46 +02:00
Dominik Sliwa
28447ba633 Rework PoE to use MP8008
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-10-08 09:12:00 +02:00
Stefan Agner
956fa60166 Begin replacing TPS23734 with MPS MP8008
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-10-06 19:51:08 +02:00
Stefan Agner
c4739259fe Mark Transformer Pulse PA2467NL as PoE only
Set Config +PoE to make sure that Pulse is only assembled in PoE BOM.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-30 09:56:04 +02:00
Stefan Agner
71aa37cac9 Bump Amber revision to 1.0
Make sure all drawings are set to 1.0. Update Board stackup (colors) and
add tables to comment layer.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-30 01:03:36 +02:00
Stefan Agner
a6b400a016 Cleanup parts silkscreen
Cleanup part reference silkscreen. Change D6 <=> D24 to make the three
LEDs to be numbered in a row.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-29 21:38:47 +02:00
Stefan Agner
5b9b87d8e2 Address DRC issues
Run annotation again which just updated some net names. Address various
DRC issues like courtyard violence and exclude the remaining DRC errors.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-29 20:49:51 +02:00
Dominik Sliwa
fe1b207586 PoE.kicad_sch: fix Vss and remove vss-gnd1 diode
Vss was pointing to general GND.
Diode is not used int PSR topology.

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-08-24 01:12:00 +02:00
Dominik Sliwa
8064ff56e2 Remove GNDA, add audio/button ESD protection
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-08-19 00:15:53 +02:00
Stefan Agner
c77e33b88c Use non-automotive Murata Common Mode Choke
- Change FL1 to be Murata Electronics DLW5BTM102SQ2. This version is not
  automotive approved. It is cheaper and has better availability
  currently.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-18 12:32:33 +02:00
Stefan Agner
f1f01884f4 Rename Light Blue to Amber in PoE schematic
Use correct sheet name as well as library reference.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-18 12:19:14 +02:00
Stefan Agner
2c22d7083a Fix/improve various parts
- U7: Define Manufacturer/PartNumber
- J13: Define Manufacturer/PartNumber
- L2: Fix PartNumber (remove unprintable characters)
- C85: Change to our preferred supplier Nichicon
- J9: DNP (not used by default, avoid potential issues with FCC approval)
- Y1/Y2: Define frequency and load capacitance in value
- JP1: Use sensible part value
- C106: Fix Config field
- Remove heat sink and CM4 from BOM (handled in product assembly BOM)

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-18 12:16:09 +02:00
Dominik Sliwa
792c242592 Changes to PoE for EMI compliance and improved efficiency
PoE
-Added a common mode filter on the input
-FB filter on the output side
-12V in now disables the poe with the DEN pin
-DT is now disabled
-PSRS is now disabled
-move to 1210 resistors for resistors identified in thermal testing
-DTHR is now enabled in default BoM
-some resistor values were adjusted
-some caps were moved to the common power supply section

USB:
-USB Hub 1.8V rail have capacitors added

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-08-18 00:36:27 +02:00
Stefan Agner
b8f0c079b8 Set Config correct for PoE class selector
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-14 22:43:44 +02:00
Stefan Agner
cd69083a95 Set Config correctly for PoE only parts
Fixes: #34

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-14 18:40:35 +02:00
Stefan Agner
52cf25ad98 Use Terminus Tech FE1.1 USB Hub
Fixes: #28

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-13 15:33:11 +02:00
Stefan Agner
696233c284 Renmae LightBlue to Amber
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-12 20:20:45 +02:00
Stefan Agner
3b825fc80d Update project files with latest KiCad 6 nightly
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-08-12 13:10:13 +02:00
Dominik Sliwa
076bbdf181 initial rev 0.3:
updates
schematic:
-change usb current protection IC to 1.5A
-Added low-pass filter to the audio output
-PoE fixed primary windings polarity
-added option to select poe class with a jumper (between 3 and 4)
-fixes in poe design
-added testpoints
-added virtual hirose df40c connectors for pick and place use

lightblue.pretty:
-added fake DF40C footprint for pick and place and 3d model purposes

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-06-05 23:10:33 +02:00
Stefan Agner
fae11d7a77 Change footprint of C87/C91 to 1206
2.2uF/100V don't really exist in 0805 package. Use 1206 package for
those capacitors.

Fixes: #21

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-05-29 13:54:28 +02:00
Stefan Agner
d357365ab2 Clarify rating of C52/R53
C52 needs to be 100n/25V, R53 should be 1% accuracy.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-05-29 13:11:28 +02:00
Stefan Agner
c237fee832 Change rating of PoE capacitors to 2.2uF/25V
2.2uF/100V are not really available in a 0805 package. This part of
the PoE design a 25V rating is sufficent.

Fixes: #22

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-05-29 13:01:38 +02:00
Stefan Agner
1699c93e59 Update silkscreen/adjust reference designators
Order some relevant reference designator. Use JP for all jumpers. Place
silkcreen neatly. Add some custom silk screen. Remove heat sink corner
marks on silk screen.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-27 16:59:52 +02:00
Dominik Sliwa
b1e3c7e17c pcb 0.2:
Changes:
Footrints:
-Modified DC Jack to accomodate CUI PJ-002A
-Modified RJ45 to increase clearance between shield and poe pins
-Modified m.2 mounting pads to avoid drc errors
Schematic:
-usb-c facing usb mux is supplied by +3v3VP
-added misc. capacitors
PCB
-min. annular ring for vias set to 0.125 from 0.2

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-04-27 02:06:11 +02:00
Stefan Agner
11f79076eb Add footprint for Pulse PA2467NL transformer
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-16 16:22:34 +02:00
Stefan Agner
f12d8178a4 Add PG-TSDSON-8-1 package for Infineon BSZ440N10NS3
Add package for Infineon N-Channel MOSFET BSZ440N10NS3.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-16 15:59:26 +02:00
Stefan Agner
ffb1a161e1 Adjust rating/footprint size of some ceramic capacitors
Also update connector/jumper designator to make more sense.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-16 14:34:56 +02:00
Stefan Agner
e1079c97d4 Reannotate the complete schematics
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-16 00:22:28 +02:00
Stefan Agner
e2740025eb Adjust various parts to improve BOM
- Replace unusual/high value ceramics with lower value in parallel
- Use the same protection Shottky Diode in PoE as in regular input
  (B340LB-13-F)
- Replace PoE rectifier Diodes with B1100-13-F
- Replace PoE Inductor (SRN6045TA-3R3Y) with the same part from 5V power
  supply (Taiyo Yuden NRS8030T3R3MJGJ)
- Correctly specify Pulse Electronics transformer

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-15 23:52:59 +02:00
Stefan Agner
8382d3b79c Adjust Manufacturer/PartNumber for some parts
- Use Diodes B2100-13-F consistently
- Define part for pin headers
- Replace N-Channel MOSFET for PoE with BSZ440N10NS3GATMA1
- Define Input protection MOSFET DMP3013SFV-7

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-15 21:49:27 +02:00
Stefan Agner
d2b0064975 Use CamelCase style naming for all schematic files
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-15 20:44:58 +02:00