This converts PCB/Schematic files to KiCad 7 format. Converted by simply
opening the project and press save.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Adjust silk screen graphics to match current layout. Adjust silk screen
reference designator placements. Bump date and version of schematics and
PCB.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Increment to sub-version v1.2. Main changes are:
- Back and front silk screen
- LED resistors
There are no changes in the layout and any critical components.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Fix edge cut on lower right corner to make board size exact
- Update board charactristics
- Set grid origin back to 30, 30
- Update M.2 expansion silk screen (remove AI accelerator hint)
- Various silk screen reference designator fixes/improvements
- Add ESD warning logo
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Update silk screen reference designators
- Update backside silk screen for Yellow revision 1.1
- Set U21 (SOIC-8 RTC) to assemble and U25 (MSOP-8) as DNP
- Update heatsink footprint to add heatsink outline to silk screen (#44)
- Mark orientation of D26, D27, D28 and D29 (fixes#39)
- Use pin-header footprint for PoE selector J13, it is now JP5
Signed-off-by: Stefan Agner <stefan@agner.ch>
Add symbol for the "reverse" ESD suppressor diodes. Those are mainly
required for Audio. Update schematics using this new symbol.
Signed-off-by: Stefan Agner <stefan@agner.ch>
PoE
-Added a common mode filter on the input
-FB filter on the output side
-12V in now disables the poe with the DEN pin
-DT is now disabled
-PSRS is now disabled
-move to 1210 resistors for resistors identified in thermal testing
-DTHR is now enabled in default BoM
-some resistor values were adjusted
-some caps were moved to the common power supply section
USB:
-USB Hub 1.8V rail have capacitors added
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
Replace the HRO part with the XKB part. The HRO part had shorter feet
which caused issues during soldering.
Fixes: #30
Signed-off-by: Stefan Agner <stefan@agner.ch>
updates
schematic:
-change usb current protection IC to 1.5A
-Added low-pass filter to the audio output
-PoE fixed primary windings polarity
-added option to select poe class with a jumper (between 3 and 4)
-fixes in poe design
-added testpoints
-added virtual hirose df40c connectors for pick and place use
lightblue.pretty:
-added fake DF40C footprint for pick and place and 3d model purposes
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
Use a through hole 3.5mm Audio jack to make sure it does nto get teared
off the board accidentially that easily.
Fixes: #9
Signed-off-by: Stefan Agner <stefan@agner.ch>
Add the CM4 board to board connectors using separate symbols. This is a
bit a hack, but makes sure two pieces appear in the BOM.
Also, this seems to upgrade all the schematic to the latest KiCad
schematic version.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Fix footprint for 02x05 pin header
- Add footprint for Bourns SDR1006 Inductor (PoE)
- Define footprints for inductors
- Define footprints for ferrite beads
- Define footprint for fuse
- Define footprints for all resistors
- Define footprints for SD card and other components
- Switch ON Semi NCP114MX with TI TLV73333PDBV
Signed-off-by: Stefan Agner <stefan@agner.ch>
Add 3.5mm Audio plug footprint for CUI SJ2-35953A-SMT-TR and assign it.
Define Config to be +Audio for audio components.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Moved PoE to a seperate sheet and finished design
- Started using Config field for Variants and DNP flag
- Fix-ups
- Added Wurth 749119550 and TI TPS23734 to the symbol library
- Changed RTC from PCF8563 to PCF85063
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added sdcard sheet and SD bus
-changed main i2c bus
-added 1.8V and 3.3V connection to CM4
-removed clk32 from led driver
-fixed PCM interface Data pin
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added AP64501SP-13 library symbol
-Initial power supplies schematics
-Increased capacitance for PCIe socket
-Connections between sheets
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added net classes for controlled impedance traces
-Added power hierarchical sheet
-Initial USB subsystem schematic
-Added multiple bus definitions (usb, pcie, i2c etc.)
-Fixed busses use
-Added LDO for audio analog rails
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
