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yellow/Yellow.kicad_dru
Dominik Sliwa 5688e1d4e1 poe 1.3 improvements for emc includes MPS layout sugestions
decreased coupling between poe lines and  the gnd plane
added vias to stich main gnd planes
decreased the peak current through the transformer
inductor based pi filter on the poe output
decreased coupling to gnd of the poe "noise path"
added parallel mosfet capacitance to poe
moved fb line fo the dcdcs away from inductors

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2022-06-13 23:20:13 +02:00

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(version 1)
(rule poe_hv
(constraint clearance (min "0.2mm"))
(condition "A.NetClass == 'poe_hv' && B.NetClass == 'poe_hv'"))