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yellow/Yellow.kicad_pro
Stefan Agner fd2eb859d7 Schematic/PCB version v1.2c 
Signed-off-by: Stefan Agner <stefan@agner.ch>
2022-05-31 13:06:06 +02:00

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{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.0,
"height": 1.22,
"width": 2.54
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 0.7999999999999999,
"silk_text_size_v": 0.7999999999999999,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.19999999999999998
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
},
{
"gap": 0.21,
"via_gap": 0.13,
"width": 0.127
},
{
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},
{
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},
{
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}
],
"drc_exclusions": [
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],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "warning",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "ignore",
"silk_overlap": "ignore",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.125,
"min_copper_edge_clearance": 0.3,
"min_hole_clearance": 0.127,
"min_hole_to_hole": 0.254,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.19999999999999998,
"min_track_width": 0.125,
"min_via_annular_width": 0.125,
"min_via_diameter": 0.44999999999999996,
"use_height_for_length_calcs": true
},
"track_widths": [
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0.127,
0.15,
0.2,
0.238,
0.25,
0.3,
0.4,
0.6,
1.0,
1.2,
1.5,
2.0
],
"via_dimensions": [
{
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},
{
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},
{
"diameter": 0.6,
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},
{
"diameter": 0.8,
"drill": 0.4
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
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],
"rule_severities": {
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"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "error",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "Yellow.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
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"clearance": 0.127,
"diff_pair_gap": 0.127,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.154,
"line_style": 0,
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"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
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},
{
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"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "diff_100",
"nets": [
"/CM4/ETH.TD1+",
"/CM4/ETH.TD1-",
"/CM4/ETH.TD2+",
"/CM4/ETH.TD2-",
"/CM4/ETH.TD3+",
"/CM4/ETH.TD3-",
"/CM4/ETH.TD4+",
"/CM4/ETH.TD4-",
"/CM4/HDMI.CLK+",
"/CM4/HDMI.CLK-",
"/CM4/HDMI.D0+",
"/CM4/HDMI.D0-",
"/CM4/HDMI.D1+",
"/CM4/HDMI.D1-",
"/CM4/HDMI.D2+",
"/CM4/HDMI.D2-"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
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},
{
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"name": "diff_85",
"nets": [
"/CM4/PCIe.CLK+",
"/CM4/PCIe.CLK-",
"/CM4/PCIe.RX+",
"/CM4/PCIe.RX-",
"/CM4/PCIe.TX+",
"/CM4/PCIe.TX-"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
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},
{
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"name": "diff_90",
"nets": [
"/CM4/CM4_USB_D+",
"/CM4/CM4_USB_D-",
"/USB/CP.D+",
"/USB/CP.D-",
"/USB/HUB.D+",
"/USB/HUB.D-",
"/USB/OTG.D+",
"/USB/OTG.D-",
"/USB/USB-C.D+",
"/USB/USB-C.D-",
"/USB/USB0.D+",
"/USB/USB0.D-",
"/USB/USB1.D+",
"/USB/USB1.D-"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
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},
{
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"line_style": 0,
"microvia_diameter": 0.3,
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"name": "poe_hv",
"nets": [
"/Ethernet/ETH_SHLD",
"/Ethernet/VC1",
"/Ethernet/VC2",
"/Ethernet/VC3",
"/Ethernet/VC4"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.25,
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 5.0
},
{
"bus_width": 12.0,
"clearance": 0.2,
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"diff_pair_width": 0.0,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "sing_50",
"nets": [
"/802.15.4 Radio/RF_SIGNAL"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.293,
"via_diameter": 0.45,
"via_drill": 0.2,
"wire_width": 5.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "LightBlue_0.3.step",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_bus_thickness": 12.0,
"default_junction_size": 36.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"default_wire_thickness": 6.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.3,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.3
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "output-v1.2c/",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"abc482bd-3f17-4d35-80db-1da3dcdb5c27",
""
],
[
"7c248bd3-8232-4777-a40c-eab53460cf85",
"CM4"
],
[
"aa1d8d83-5167-420c-9ee7-3e4dcc942bfc",
"USB"
],
[
"12f6ca59-5dee-4aea-b4bb-e4b9cab2885b",
"802.15.4 Radio"
],
[
"a9e0a5b9-8f0f-46f3-b2b0-a429c678afed",
"Audio"
],
[
"18c18357-12fa-4472-a108-e954e5bd7840",
"Ethernet"
],
[
"a1a835e0-c072-4609-9cb4-4b95bf746f54",
"PCIe"
],
[
"c7bf4e1f-6bd1-4be7-9e56-1bd438bf5d42",
"Power"
],
[
"441a9908-1e74-440b-b462-bdf6815583fe",
"Control/RTC"
],
[
"67ada73c-6692-4fd8-8c20-5be89f2b8650",
"SDCard"
],
[
"6888556d-e390-44b5-977e-8a0092745a4b",
"PoE"
]
],
"text_variables": {}
}
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