salfter/32k-rom-ram
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fix component rotations for assembly

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This commit is contained in:
Scott Alfter
2025-04-07 09:18:32 -07:00
parent fc2d40cd84
commit 0cf3448e55
20 changed files with 55641 additions and 55577 deletions
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2
.gitignore vendored
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@@ -28,4 +28,4 @@ fp-info-cache
# Exported BOM files
*.xml
*.csv
#*.csv

8
32k-rom-ram.csv Normal file
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@@ -0,0 +1,8 @@
"Id";"Designator";"Footprint";"Quantity";"Designation";"Supplier and ref";
1;"U2";"SOP-28_8.4x18.16mm_P1.27mm";1;"62256";;;
2;"C3,C2,C1,C4";"C_0603_1608Metric";4;"0.1 µF";;;
3;"U4";"DIP-28_W15.24mm";1;"28C256";;;
4;"J1";"PinHeader_1x39_P2.54mm_Horizontal";1;"Conn_01x39_Pin";;;
5;"U1";"TSSOP-8_3x3mm_P0.65mm";1;"74HCT2G32";;;
6;"U3";"SOT-353_SC-70-5";1;"74HCT1G04";;;
7;"Socket_U4";"DIP-28_W15.24mm";1;;;;
1 Id Designator Footprint Quantity Designation Supplier and ref
2 1 U2 SOP-28_8.4x18.16mm_P1.27mm 1 62256
3 2 C3,C2,C1,C4 C_0603_1608Metric 4 0.1 µF
4 3 U4 DIP-28_W15.24mm 1 28C256
5 4 J1 PinHeader_1x39_P2.54mm_Horizontal 1 Conn_01x39_Pin
6 5 U1 TSSOP-8_3x3mm_P0.65mm 1 74HCT2G32
7 6 U3 SOT-353_SC-70-5 1 74HCT1G04
8 7 Socket_U4 DIP-28_W15.24mm 1

9
32k-rom-ram.kicad_pcb
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@@ -103,7 +103,6 @@
(psnegative no)
(psa4output no)
(plot_black_and_white yes)
(plotinvisibletext no)
(sketchpadsonfab no)
(plotpadnumbers no)
(hidednponfab no)
@@ -1218,7 +1217,7 @@
(property "Reference" "U4"
(at 7.62 -2.33 90)
(layer "F.SilkS")
(uuid "b3013d2b-382c-4cec-add9-b97d8711b93b")
(uuid "03fcf12c-b4ba-4207-8b85-dd7630211a88")
(effects
(font
(size 1 1)
@@ -1229,7 +1228,7 @@
(property "Value" "28C256"
(at 7.62 35.35 90)
(layer "F.Fab")
(uuid "2ca50c6d-ced9-44c6-982d-4eb28ab2ea53")
(uuid "ea4c21de-b4a5-45db-84ed-772343d8a939")
(effects
(font
(size 1 1)
@@ -1241,7 +1240,7 @@
(at 0 0 90)
(layer "F.Fab")
(hide yes)
(uuid "b5a9479c-5a30-4c1a-8a77-ecb14b30cef1")
(uuid "34867003-75dd-44a9-a5e5-1ac5a940adc6")
(effects
(font
(size 1.27 1.27)
@@ -1253,7 +1252,7 @@
(at 0 0 90)
(layer "F.Fab")
(hide yes)
(uuid "31e565ed-bab4-4cfd-ac57-ac8f109da01d")
(uuid "a8cb2a9e-20fc-4697-b796-251e0cbe77ef")
(effects
(font
(size 1.27 1.27)

3
32k-rom-ram.kicad_pro
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@@ -110,6 +110,7 @@
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_on_edge_cuts": "error",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
@@ -535,7 +536,7 @@
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "32k-rom-ram.step",
"step": "${PROJECTNAME}.step",
"svg": "",
"vrml": ""
},

111120
32k-rom-ram.step
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File diff suppressed because it is too large Load Diff

5
README.md
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@@ -5,3 +5,8 @@ An RC2014-compatible board with 32K each of SRAM and EEPROM/EPROM. RAM is
mapped to 0x8000-0xFFFF. ROM is mapped to 0x0000-0x7FFF and is socketed for
reprogrammability.
KiCad configuration notes
-------------------------
In the [JLCPCB Tools plugin](https://github.com/Bouni/kicad-jlcpcb-tools),
import [jlcpcb-rotations.csv](https://gitlab.alfter.us/salfter/rc2014-compat/-/raw/master/jlcpcb-rotations.csv).

6
jlcpcb/gerber/32k-rom-ram-CuBottom.gbr
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@@ -1,12 +1,12 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.0*%
%TF.CreationDate,2025-04-02T13:21:47-07:00*%
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.1*%
%TF.CreationDate,2025-04-07T11:30:42-07:00*%
%TF.ProjectId,32k-rom-ram,33326b2d-726f-46d2-9d72-616d2e6b6963,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Copper,L2,Bot*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 9.0.0) date 2025-04-02 13:21:47*
G04 Created by KiCad (PCBNEW 9.0.1) date 2025-04-07 11:30:42*
%MOMM*%
%LPD*%
G01*

6
jlcpcb/gerber/32k-rom-ram-CuTop.gbr
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@@ -1,12 +1,12 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.0*%
%TF.CreationDate,2025-04-02T13:21:47-07:00*%
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.1*%
%TF.CreationDate,2025-04-07T11:30:42-07:00*%
%TF.ProjectId,32k-rom-ram,33326b2d-726f-46d2-9d72-616d2e6b6963,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Copper,L1,Top*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 9.0.0) date 2025-04-02 13:21:47*
G04 Created by KiCad (PCBNEW 9.0.1) date 2025-04-07 11:30:42*
%MOMM*%
%LPD*%
G01*

6
jlcpcb/gerber/32k-rom-ram-EdgeCuts.gbr
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@@ -1,11 +1,11 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.0*%
%TF.CreationDate,2025-04-02T13:21:47-07:00*%
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.1*%
%TF.CreationDate,2025-04-07T11:30:43-07:00*%
%TF.ProjectId,32k-rom-ram,33326b2d-726f-46d2-9d72-616d2e6b6963,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Profile,NP*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 9.0.0) date 2025-04-02 13:21:47*
G04 Created by KiCad (PCBNEW 9.0.1) date 2025-04-07 11:30:43*
%MOMM*%
%LPD*%
G01*

6
jlcpcb/gerber/32k-rom-ram-MaskBottom.gbr
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@@ -1,12 +1,12 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.0*%
%TF.CreationDate,2025-04-02T13:21:47-07:00*%
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.1*%
%TF.CreationDate,2025-04-07T11:30:43-07:00*%
%TF.ProjectId,32k-rom-ram,33326b2d-726f-46d2-9d72-616d2e6b6963,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Soldermask,Bot*%
%TF.FilePolarity,Negative*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 9.0.0) date 2025-04-02 13:21:47*
G04 Created by KiCad (PCBNEW 9.0.1) date 2025-04-07 11:30:43*
%MOMM*%
%LPD*%
G01*

6
jlcpcb/gerber/32k-rom-ram-MaskTop.gbr
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@@ -1,12 +1,12 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.0*%
%TF.CreationDate,2025-04-02T13:21:47-07:00*%
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.1*%
%TF.CreationDate,2025-04-07T11:30:42-07:00*%
%TF.ProjectId,32k-rom-ram,33326b2d-726f-46d2-9d72-616d2e6b6963,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Soldermask,Top*%
%TF.FilePolarity,Negative*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 9.0.0) date 2025-04-02 13:21:47*
G04 Created by KiCad (PCBNEW 9.0.1) date 2025-04-07 11:30:42*
%MOMM*%
%LPD*%
G01*

BIN
jlcpcb/gerber/32k-rom-ram-NPTH-drl_map.pdf
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6
jlcpcb/gerber/32k-rom-ram-NPTH.drl
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@@ -1,8 +1,8 @@
M48
; DRILL file {KiCad 9.0.0} date 2025-04-02T13:21:47-0700
; DRILL file {KiCad 9.0.1} date 2025-04-07T11:30:43-0700
; FORMAT={-:-/ absolute / inch / decimal}
; #@! TF.CreationDate,2025-04-02T13:21:47-07:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.0
; #@! TF.CreationDate,2025-04-07T11:30:43-07:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.1
; #@! TF.FileFunction,NonPlated,1,2,NPTH
FMAT,2
INCH

BIN
jlcpcb/gerber/32k-rom-ram-PTH-drl_map.pdf
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Binary file not shown.

6
jlcpcb/gerber/32k-rom-ram-PTH.drl
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@@ -1,8 +1,8 @@
M48
; DRILL file {KiCad 9.0.0} date 2025-04-02T13:21:47-0700
; DRILL file {KiCad 9.0.1} date 2025-04-07T11:30:43-0700
; FORMAT={-:-/ absolute / inch / decimal}
; #@! TF.CreationDate,2025-04-02T13:21:47-07:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.0
; #@! TF.CreationDate,2025-04-07T11:30:43-07:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.1
; #@! TF.FileFunction,Plated,1,2,PTH
FMAT,2
INCH

6
jlcpcb/gerber/32k-rom-ram-SilkBottom.gbr
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@@ -1,12 +1,12 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.0*%
%TF.CreationDate,2025-04-02T13:21:47-07:00*%
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.1*%
%TF.CreationDate,2025-04-07T11:30:43-07:00*%
%TF.ProjectId,32k-rom-ram,33326b2d-726f-46d2-9d72-616d2e6b6963,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Legend,Bot*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 9.0.0) date 2025-04-02 13:21:47*
G04 Created by KiCad (PCBNEW 9.0.1) date 2025-04-07 11:30:43*
%MOMM*%
%LPD*%
G01*

6
jlcpcb/gerber/32k-rom-ram-SilkTop.gbr
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@@ -1,12 +1,12 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.0*%
%TF.CreationDate,2025-04-02T13:21:47-07:00*%
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.1*%
%TF.CreationDate,2025-04-07T11:30:42-07:00*%
%TF.ProjectId,32k-rom-ram,33326b2d-726f-46d2-9d72-616d2e6b6963,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Legend,Top*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 9.0.0) date 2025-04-02 13:21:47*
G04 Created by KiCad (PCBNEW 9.0.1) date 2025-04-07 11:30:42*
%MOMM*%
%LPD*%
G01*

7
jlcpcb/production_files/BOM-32k-rom-ram.csv Normal file
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@@ -0,0 +1,7 @@
Comment,Designator,Footprint,LCSC,Quantity
0.1 µF,"C1,C2,C3,C4",C_0603_1608Metric,C14663,4
62256,U2,SOP-28_8.4x18.16mm_P1.27mm,C1523867,1
28C256,U4,DIP-28_W15.24mm,C2874016,1
Conn_01x39_Pin,J1,PinHeader_1x39_P2.54mm_Horizontal,C2883877,1
74HCT1G04,U3,SOT-353_SC-70-5,C547442,1
74HCT2G32,U1,TSSOP-8_3x3mm_P0.65mm,C547572,1
1 Comment Designator Footprint LCSC Quantity
2 0.1 µF C1,C2,C3,C4 C_0603_1608Metric C14663 4
3 62256 U2 SOP-28_8.4x18.16mm_P1.27mm C1523867 1
4 28C256 U4 DIP-28_W15.24mm C2874016 1
5 Conn_01x39_Pin J1 PinHeader_1x39_P2.54mm_Horizontal C2883877 1
6 74HCT1G04 U3 SOT-353_SC-70-5 C547442 1
7 74HCT2G32 U1 TSSOP-8_3x3mm_P0.65mm C547572 1

10
jlcpcb/production_files/CPL-32k-rom-ram.csv Normal file
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@@ -0,0 +1,10 @@
Designator,Val,Package,Mid X,Mid Y,Rotation,Layer
C1,0.1 µF,C_0603_1608Metric,56.007,6.096,90.0,top
C2,0.1 µF,C_0603_1608Metric,35.065,24.13,180.0,top
C3,0.1 µF,C_0603_1608Metric,2.672,15.494,180.0,top
C4,0.1 µF,C_0603_1608Metric,27.94,45.72,-90.0,top
J1,Conn_01x39_Pin,PinHeader_1x39_P2.54mm_Horizontal,50.0634,1.7526,-90.0,top
U1,74HCT2G32,TSSOP-8_3x3mm_P0.65mm,59.817,6.35,90.0,top
U2,62256,SOP-28_8.4x18.16mm_P1.27mm,46.355,18.5675,0.0,top
U3,74HCT1G04,SOT-353_SC-70-5,2.987,12.969,180.0,top
U4,28C256,DIP-28_W15.24mm,46.99,38.735,0.0,top
1 Designator Val Package Mid X Mid Y Rotation Layer
2 C1 0.1 µF C_0603_1608Metric 56.007 6.096 90.0 top
3 C2 0.1 µF C_0603_1608Metric 35.065 24.13 180.0 top
4 C3 0.1 µF C_0603_1608Metric 2.672 15.494 180.0 top
5 C4 0.1 µF C_0603_1608Metric 27.94 45.72 -90.0 top
6 J1 Conn_01x39_Pin PinHeader_1x39_P2.54mm_Horizontal 50.0634 1.7526 -90.0 top
7 U1 74HCT2G32 TSSOP-8_3x3mm_P0.65mm 59.817 6.35 90.0 top
8 U2 62256 SOP-28_8.4x18.16mm_P1.27mm 46.355 18.5675 0.0 top
9 U3 74HCT1G04 SOT-353_SC-70-5 2.987 12.969 180.0 top
10 U4 28C256 DIP-28_W15.24mm 46.99 38.735 0.0 top

BIN
jlcpcb/production_files/GERBER-32k-rom-ram.zip
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