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KiCad 9/PartDB changes, and add resistors to USB-C CC* pins

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This commit is contained in:
Scott Alfter
2025-04-02 13:23:28 -07:00
parent f8508a96e0
commit bf21a273b4
42 changed files with 361336 additions and 149087 deletions
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3
.gitmodules vendored
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@@ -1,3 +0,0 @@
[submodule "kicad-libs"]
path = kicad-libs
url = https://gitlab.alfter.us/salfter/kicad-libs

14
1-click-bom.tsv
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@@ -1,14 +0,0 @@
Inv_ID References Qty Description Package Manufacturer MPN DigiKey_SKU LCSC_SKU Mouser_SKU
1 C1 1 22 µF 0603 capacitor 0603 Samsung CL10A226MP8NUNE 1276-1274-1-ND C86295 187-CL10A226MP8NUNE
2 C_U1 1 0.1 µF 0603 capacitor 0603 Samsung CL10B104KB8NNNC 1276-1000-1-ND C1591 187-CL10B104KB8NNNC
3 D1 1 0603 small-signal diode 0603 Taiwan Semi TS4148C RZG TS4148CRZGCT-ND C3312580 821-TS4148C
4 D2 1 0603 red LED 0603 Würth 150060SS75000 732-4979-1-ND 710-150060SS75000
5 J1, J4, J7, J10 4 "pin socket, 1x39, .100""" Samtec CES-139-01-T-S SAM1087-39-ND 200-CES13901TS
6 J2, J5, J8, J11 4 "pin socket, 1x23, .100""" Samtec CES-123-01-T-S SAM1087-23-ND 200-CES12301TS
7 J13 1 PCI Express x4 connector, board-edge straddle mount Sullins Connector Solutions GWE32DHRN-T9410 S9647-ND C4949167
8 J15, J16 2 "pin header, 1x4, .100""" Amphenol 68016-104HLF 609-3312-ND 649-68016-104HLF
9 J17 1 USB-C socket GCT USB4085-GF-A 2073-USB4085-GF-ACT-ND 640-USB4085-GF-A
10 R1 1 10 kΩ 0603 resistor 0603 Yageo RC0603FR-0710KL 311-10.0KHRCT-ND C98220 603-RC0603FR-0710KL
11 R2 1 470 Ω 0603 resistor 0603 Yageo RC0603FR-07470RL RC0603FR-07470RL C114669 603-RC0603FR-07470RL
12 SW1 1 6x6mm tactile switch C&K PTS645SM43SMTR92LFS CKN9112CT-ND C221880 611-PTS645SM43SMTR92
13 U1 1 hex inverter, Schmitt trigger input SOIC-14 Texas Instruments SN74HCT14DR 296-14864-1-ND C6769 595-SN74HCT14DR
1 Inv_ID References Qty Description Package Manufacturer MPN DigiKey_SKU LCSC_SKU Mouser_SKU
2 1 C1 1 22 µF 0603 capacitor 0603 Samsung CL10A226MP8NUNE 1276-1274-1-ND C86295 187-CL10A226MP8NUNE
3 2 C_U1 1 0.1 µF 0603 capacitor 0603 Samsung CL10B104KB8NNNC 1276-1000-1-ND C1591 187-CL10B104KB8NNNC
4 3 D1 1 0603 small-signal diode 0603 Taiwan Semi TS4148C RZG TS4148CRZGCT-ND C3312580 821-TS4148C
5 4 D2 1 0603 red LED 0603 Würth 150060SS75000 732-4979-1-ND 710-150060SS75000
6 5 J1, J4, J7, J10 4 pin socket, 1x39, .100" Samtec CES-139-01-T-S SAM1087-39-ND 200-CES13901TS
7 6 J2, J5, J8, J11 4 pin socket, 1x23, .100" Samtec CES-123-01-T-S SAM1087-23-ND 200-CES12301TS
8 7 J13 1 PCI Express x4 connector, board-edge straddle mount Sullins Connector Solutions GWE32DHRN-T9410 S9647-ND C4949167
9 8 J15, J16 2 pin header, 1x4, .100" Amphenol 68016-104HLF 609-3312-ND 649-68016-104HLF
10 9 J17 1 USB-C socket GCT USB4085-GF-A 2073-USB4085-GF-ACT-ND 640-USB4085-GF-A
11 10 R1 1 10 kΩ 0603 resistor 0603 Yageo RC0603FR-0710KL 311-10.0KHRCT-ND C98220 603-RC0603FR-0710KL
12 11 R2 1 470 Ω 0603 resistor 0603 Yageo RC0603FR-07470RL RC0603FR-07470RL C114669 603-RC0603FR-07470RL
13 12 SW1 1 6x6mm tactile switch C&K PTS645SM43SMTR92LFS CKN9112CT-ND C221880 611-PTS645SM43SMTR92
14 13 U1 1 hex inverter, Schmitt trigger input SOIC-14 Texas Instruments SN74HCT14DR 296-14864-1-ND C6769 595-SN74HCT14DR

5
README.md
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@@ -22,6 +22,5 @@ integrated into the PCB layout, it's basically free.
Beyond that, the board provides support for both extended (second row of 10
pins) and 16-bit (second row of 23 pins) RC2014-compatible cards. It breaks
out both UART connections to 4-pin connectors (note: TX and RX labels are
intentionally swapped; connect TX to TX and RX to RX), uses any USB-C power
supply, and provides power-on reset and a reset button.
out both UART connections to 4-pin connectors, uses any USB-C power supply,
and provides power-on reset and a reset button.

61386
backplane16pcie.kicad_pcb
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422
backplane16pcie.kicad_pro
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@@ -1,15 +1,19 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
"copper_line_width": 0.19999999999999998,
"apply_defaults_to_fp_fields": false,
"apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false,
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"courtyard_line_width": 0.05,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
@@ -20,7 +24,7 @@
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_line_width": 0.1,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
@@ -33,9 +37,9 @@
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 3.2,
"height": 3.2,
"width": 3.2
"drill": 1.0,
"height": 1.7,
"width": 1.7
},
"silk_line_width": 0.15,
"silk_text_italic": false,
@@ -62,35 +66,55 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"creepage": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_filters_mismatch": "ignore",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"hole_to_hole": "error",
"holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"mirrored_text_on_front_layer": "warning",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"nonmirrored_text_on_back_layer": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_angle": "error",
"track_dangling": "warning",
"track_segment_length": "error",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
@@ -104,23 +128,101 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.0,
"min_groove_width": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"min_track_width": 0.2,
"min_via_annular_width": 0.05,
"min_via_diameter": 0.4,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0
"teardrop_options": [
{
"td_onpthpad": true,
"td_onroundshapesonly": false,
"td_onsmdpad": true,
"td_ontrackend": false,
"td_onvia": true
}
],
"teardrop_parameters": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [
0.0,
0.1,
0.2
],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 1.0
},
"diff_pair_skew_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
},
"single_track_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
}
},
"via_dimensions": [
{
"diameter": 0.0,
@@ -130,7 +232,16 @@
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
"ipc2581": {
"dist": "",
"distpn": "",
"internal_id": "",
"mfg": "",
"mpn": ""
},
"layer_pairs": [],
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
@@ -321,11 +432,21 @@
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"footprint_filter": "ignore",
"footprint_link_issues": "warning",
"four_way_junction": "ignore",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"label_multiple_wires": "warning",
"lib_symbol_issues": "warning",
"lib_symbol_mismatch": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
@@ -334,8 +455,14 @@
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"same_local_global_label": "warning",
"similar_label_and_power": "warning",
"similar_labels": "warning",
"similar_power": "warning",
"simulation_model_issue": "ignore",
"single_global_label": "ignore",
"unannotated": "error",
"unconnected_wire_endpoint": "warning",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
@@ -347,12 +474,12 @@
},
"meta": {
"filename": "backplane16pcie.kicad_pro",
"version": 1
"version": 3
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@@ -362,14 +489,15 @@
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@@ -378,37 +506,266 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Power",
"nets": [
"5V",
"GND"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.5,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 4
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "Power",
"pattern": "5V"
},
{
"netclass": "Power",
"pattern": "GND"
}
]
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "../../backplane16pcie.step",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"bom_export_filename": "${PROJECTNAME}.csv",
"bom_fmt_presets": [],
"bom_fmt_settings": {
"field_delimiter": ",",
"keep_line_breaks": false,
"keep_tabs": false,
"name": "CSV",
"ref_delimiter": ",",
"ref_range_delimiter": "",
"string_delimiter": "\""
},
"bom_presets": [],
"bom_settings": {
"exclude_dnp": false,
"fields_ordered": [
{
"group_by": false,
"label": "Reference",
"name": "Reference",
"show": true
},
{
"group_by": false,
"label": "Qty",
"name": "${QUANTITY}",
"show": true
},
{
"group_by": true,
"label": "Value",
"name": "Value",
"show": true
},
{
"group_by": true,
"label": "DNP",
"name": "${DNP}",
"show": true
},
{
"group_by": true,
"label": "Exclude from BOM",
"name": "${EXCLUDE_FROM_BOM}",
"show": true
},
{
"group_by": true,
"label": "Exclude from Board",
"name": "${EXCLUDE_FROM_BOARD}",
"show": true
},
{
"group_by": true,
"label": "Footprint",
"name": "Footprint",
"show": true
},
{
"group_by": false,
"label": "Datasheet",
"name": "Datasheet",
"show": true
},
{
"group_by": false,
"label": "DK_Mfr_PN",
"name": "DK_Mfr_PN",
"show": false
},
{
"group_by": false,
"label": "DK_PN",
"name": "DK_PN",
"show": false
},
{
"group_by": false,
"label": "DigiKey_SKU",
"name": "DigiKey_SKU",
"show": false
},
{
"group_by": false,
"label": "Inv_ID",
"name": "Inv_ID",
"show": false
},
{
"group_by": false,
"label": "LCSC_SKU",
"name": "LCSC_SKU",
"show": false
},
{
"group_by": false,
"label": "MAXIMUM_PACKAGE_HEIGHT",
"name": "MAXIMUM_PACKAGE_HEIGHT",
"show": false
},
{
"group_by": false,
"label": "MPN",
"name": "MPN",
"show": false
},
{
"group_by": false,
"label": "Manufacturer",
"name": "Manufacturer",
"show": false
},
{
"group_by": false,
"label": "Mouser_SKU",
"name": "Mouser_SKU",
"show": false
},
{
"group_by": false,
"label": "Notes",
"name": "Notes",
"show": false
},
{
"group_by": false,
"label": "PARTREV",
"name": "PARTREV",
"show": false
},
{
"group_by": false,
"label": "Package",
"name": "Package",
"show": false
},
{
"group_by": false,
"label": "STANDARD",
"name": "STANDARD",
"show": false
},
{
"group_by": false,
"label": "DK_Mfr",
"name": "DK_Mfr",
"show": false
},
{
"group_by": false,
"label": "Description",
"name": "Description",
"show": false
},
{
"group_by": false,
"label": "#",
"name": "${ITEM_NUMBER}",
"show": false
},
{
"group_by": false,
"label": "Part-DB IPN",
"name": "Part-DB IPN",
"show": false
},
{
"group_by": false,
"label": "Manufacturing Status",
"name": "Manufacturing Status",
"show": false
},
{
"group_by": false,
"label": "Category",
"name": "Category",
"show": false
},
{
"group_by": false,
"label": "Part-DB Footprint",
"name": "Part-DB Footprint",
"show": false
},
{
"group_by": false,
"label": "Part-DB ID",
"name": "Part-DB ID",
"show": false
},
{
"group_by": false,
"label": "Sim.Pins",
"name": "Sim.Pins",
"show": false
},
{
"group_by": false,
"label": "Sim.Device",
"name": "Sim.Device",
"show": false
},
{
"group_by": false,
"label": "Mass",
"name": "Mass",
"show": false
}
],
"filter_string": "",
"group_symbols": true,
"include_excluded_from_bom": true,
"name": "",
"sort_asc": true,
"sort_field": "Reference"
},
"connection_grid_size": 50.0,
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
@@ -419,6 +776,11 @@
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"operating_point_overlay_i_precision": 3,
"operating_point_overlay_i_range": "~A",
"operating_point_overlay_v_precision": 3,
"operating_point_overlay_v_range": "~V",
"overbar_offset_ratio": 1.23,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
@@ -439,15 +801,21 @@
},
"page_layout_descr_file": "",
"plot_directory": "",
"space_save_all_events": true,
"spice_adjust_passive_values": false,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"9d0118dd-199f-4192-8639-bde6cfb60da1",
""
"Root"
]
],
"text_variables": {}

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backplane16pcie.kicad_sch
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backplane16pcie.pdf
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backplane16pcie.xml
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extras/models/GWE32DHRN-T9410.step Normal file
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extras/pcie.pretty/SULLINS_GWE32DHRN-T9410.kicad_mod Normal file
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@@ -0,0 +1,121 @@
(footprint "SULLINS_GWE32DHRN-T9410" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 62E2BF52)
(attr through_hole)
(fp_text reference "REF**" (at -9.585 -7.235) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp aa329fd0-412f-4ddc-a81d-0e6f1373e783)
)
(fp_text value "SULLINS_GWE32DHRN-T9410" (at 1.845 -5.635) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 35665996-a9a4-49e2-833b-6a95a7a8eb29)
)
(fp_line (start -14.5 -4.3) (end 24.5 -4.3) (layer "B.SilkS") (width 0.127) (tstamp 27dd80df-8045-46d3-b98d-a9e0a3a94dc9))
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)

96
extras/usb.pretty/GCT_USB4085-GF-A.kicad_mod Normal file
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@@ -0,0 +1,96 @@
(footprint "GCT_USB4085-GF-A" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 0)
(descr "through-hole USB-C connector")
(property "DK_PN" "2073-USB4085-GF-ACT-ND")
(property "Description" "USB-C socket")
(property "MPN" "USB4085-GF-A")
(property "Manufacturer" "GCT")
(property "Sheetfile" "backplane16pcie.kicad_sch")
(property "Sheetname" "")
(attr through_hole)
(fp_text reference "J17" (at 2.975 -2 -180) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp a54dc732-0a20-460a-bb63-60791a83728c)
)
(fp_text value "USB4085-GF-A" (at 3 -4 -180) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp af6f66dd-f261-4b6c-a7ae-1b7d47cede32)
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51
fabrication/backplane16pcie-B_Paste.gbr
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70
fabrication/backplane16pcie-B_Silkscreen.gbr
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G01*
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104
fabrication/backplane16pcie-Edge_Cuts.gbr
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15251
fabrication/backplane16pcie-F_Cu.gbr
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File diff suppressed because it is too large Load Diff

515
fabrication/backplane16pcie-F_Mask.gbr
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0 Rectangle with rounded corners*
0 $1 Rounding radius*
0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
0 Add a 4 corners polygon primitive as box body*
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0 Add four circle primitives for the rounded corners*
1,1,$1+$1,$2,$3*
1,1,$1+$1,$4,$5*
1,1,$1+$1,$6,$7*
1,1,$1+$1,$8,$9*
0 Add four rect primitives between the rounded corners*
20,1,$1+$1,$2,$3,$4,$5,0*
20,1,$1+$1,$4,$5,$6,$7,0*
20,1,$1+$1,$6,$7,$8,$9,0*
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G04 Aperture macros list end*
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131
fabrication/backplane16pcie-F_Paste.gbr
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
G04 Aperture macros list*
%AMRoundRect*
0 Rectangle with rounded corners*
0 $1 Rounding radius*
0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
0 Add a 4 corners polygon primitive as box body*
4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
0 Add four circle primitives for the rounded corners*
1,1,$1+$1,$2,$3*
1,1,$1+$1,$4,$5*
1,1,$1+$1,$6,$7*
1,1,$1+$1,$8,$9*
0 Add four rect primitives between the rounded corners*
20,1,$1+$1,$2,$3,$4,$5,0*
20,1,$1+$1,$4,$5,$6,$7,0*
20,1,$1+$1,$6,$7,$8,$9,0*
20,1,$1+$1,$8,$9,$2,$3,0*%
G04 Aperture macros list end*
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1354
fabrication/backplane16pcie-F_Silkscreen.gbr
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File diff suppressed because it is too large Load Diff

20
fabrication/backplane16pcie-NPTH.drl
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M48
; DRILL file {KiCad 6.0.6} date Thu 25 Aug 2022 01:14:06 AM PDT
; FORMAT={-:-/ absolute / metric / decimal}
; #@! TF.CreationDate,2022-08-25T01:14:06-07:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,6.0.6
; #@! TF.FileFunction,NonPlated,1,2,NPTH
FMAT,2
METRIC
; #@! TA.AperFunction,NonPlated,NPTH,ComponentDrill
T1C3.200
%
G90
G05
T1
X95.0Y-45.0
X95.0Y-135.0
X185.0Y-45.0
X185.0Y-135.0
T0
M30

334
fabrication/backplane16pcie-PTH.drl
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M48
; DRILL file {KiCad 6.0.6} date Thu 25 Aug 2022 01:14:06 AM PDT
; FORMAT={-:-/ absolute / metric / decimal}
; #@! TF.CreationDate,2022-08-25T01:14:06-07:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,6.0.6
; #@! TF.FileFunction,Plated,1,2,PTH
FMAT,2
METRIC
; #@! TA.AperFunction,Plated,PTH,ViaDrill
T1C0.400
; #@! TA.AperFunction,Plated,PTH,ComponentDrill
T2C0.406
; #@! TA.AperFunction,Plated,PTH,ComponentDrill
T3C0.610
; #@! TA.AperFunction,Plated,PTH,ComponentDrill
T4C1.000
%
G90
G05
T1
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X165.101Y-121.29
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X165.111Y-123.831
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T2
X159.321Y-44.791
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X161.021Y-44.791
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X163.571Y-46.141
X164.421Y-44.791
X164.421Y-46.141
X165.271Y-44.791
X165.271Y-46.141
T4
X112.075Y-82.55
X112.075Y-85.09
X112.075Y-87.63
X112.075Y-90.17
X112.075Y-92.71
X112.075Y-95.25
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X112.075Y-113.03
X112.075Y-115.57
X112.075Y-118.11
X112.075Y-120.65
X112.075Y-123.19
X112.075Y-125.73
X112.075Y-128.27
X112.075Y-130.81
X112.075Y-133.35
X112.075Y-135.89
X112.075Y-138.43
X114.615Y-41.91
X114.615Y-44.45
X114.615Y-46.99
X114.615Y-49.53
X114.615Y-52.07
X114.615Y-54.61
X114.615Y-57.15
X114.615Y-59.69
X114.615Y-62.23
X114.615Y-64.77
X114.615Y-67.31
X114.615Y-69.85
X114.615Y-72.39
X114.615Y-74.93
X114.615Y-77.47
X114.615Y-80.01
X114.615Y-82.55
X114.615Y-85.09
X114.615Y-87.63
X114.615Y-90.17
X114.615Y-92.71
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X114.615Y-97.79
X114.615Y-100.33
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X114.615Y-138.43
X120.185Y-45.65
X122.725Y-45.65
X125.265Y-45.65
X127.805Y-45.65
X131.125Y-82.55
X131.125Y-85.09
X131.125Y-87.63
X131.125Y-90.17
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X131.125Y-97.79
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X131.125Y-102.87
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X171.765Y-128.27
X171.765Y-130.81
X171.765Y-133.35
X171.765Y-135.89
X171.765Y-138.43
T3
G00X157.971Y-41.382
M15
G01X157.971Y-42.17
M16
G05
G00X157.971Y-44.411
M15
G01X157.971Y-45.911
M16
G05
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M15
G01X166.621Y-42.17
M16
G05
G00X166.621Y-44.411
M15
G01X166.621Y-45.911
M16
G05
T0
M30

127
fabrication/backplane16pcie-job.gbrjob
View File

@@ -1,127 +0,0 @@
{
"Header": {
"GenerationSoftware": {
"Vendor": "KiCad",
"Application": "Pcbnew",
"Version": "6.0.6"
},
"CreationDate": "2022-08-25T01:14:14-07:00"
},
"GeneralSpecs": {
"ProjectId": {
"Name": "backplane16pcie",
"GUID": "6261636b-706c-4616-9e65-313670636965",
"Revision": "rev?"
},
"Size": {
"X": 100.1,
"Y": 100.1
},
"LayerNumber": 2,
"BoardThickness": 1.6,
"Finish": "None"
},
"DesignRules": [
{
"Layers": "Outer",
"PadToPad": 0.0,
"PadToTrack": 0.0,
"TrackToTrack": 0.2,
"MinLineWidth": 0.25,
"TrackToRegion": 0.508,
"RegionToRegion": 0.508
}
],
"FilesAttributes": [
{
"Path": "backplane16pcie-F_Cu.gbr",
"FileFunction": "Copper,L1,Top",
"FilePolarity": "Positive"
},
{
"Path": "backplane16pcie-B_Cu.gbr",
"FileFunction": "Copper,L2,Bot",
"FilePolarity": "Positive"
},
{
"Path": "backplane16pcie-F_Paste.gbr",
"FileFunction": "SolderPaste,Top",
"FilePolarity": "Positive"
},
{
"Path": "backplane16pcie-B_Paste.gbr",
"FileFunction": "SolderPaste,Bot",
"FilePolarity": "Positive"
},
{
"Path": "backplane16pcie-F_Silkscreen.gbr",
"FileFunction": "Legend,Top",
"FilePolarity": "Positive"
},
{
"Path": "backplane16pcie-B_Silkscreen.gbr",
"FileFunction": "Legend,Bot",
"FilePolarity": "Positive"
},
{
"Path": "backplane16pcie-F_Mask.gbr",
"FileFunction": "SolderMask,Top",
"FilePolarity": "Negative"
},
{
"Path": "backplane16pcie-B_Mask.gbr",
"FileFunction": "SolderMask,Bot",
"FilePolarity": "Negative"
},
{
"Path": "backplane16pcie-Edge_Cuts.gbr",
"FileFunction": "Profile",
"FilePolarity": "Positive"
}
],
"MaterialStackup": [
{
"Type": "Legend",
"Name": "Top Silk Screen"
},
{
"Type": "SolderPaste",
"Name": "Top Solder Paste"
},
{
"Type": "SolderMask",
"Thickness": 0.01,
"Name": "Top Solder Mask"
},
{
"Type": "Copper",
"Thickness": 0.035,
"Name": "F.Cu"
},
{
"Type": "Dielectric",
"Thickness": 1.51,
"Material": "FR4",
"Name": "F.Cu/B.Cu",
"Notes": "Type: dielectric layer 1 (from F.Cu to B.Cu)"
},
{
"Type": "Copper",
"Thickness": 0.035,
"Name": "B.Cu"
},
{
"Type": "SolderMask",
"Thickness": 0.01,
"Name": "Bottom Solder Mask"
},
{
"Type": "SolderPaste",
"Name": "Bottom Solder Paste"
},
{
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"Name": "Bottom Silk Screen"
}
]
}

85779
fp-info-cache
View File

File diff suppressed because it is too large Load Diff

7
fp-lib-table
View File

@@ -1,6 +1,5 @@
(fp_lib_table
(lib (name "usb")(type "KiCad")(uri "${KIPRJMOD}/kicad-libs/usb.pretty")(options "")(descr ""))
(lib (name "sop")(type "KiCad")(uri "${KIPRJMOD}/kicad-libs/sop.pretty")(options "")(descr ""))
(lib (name "sot753")(type "KiCad")(uri "${KIPRJMOD}/kicad-libs/sot753.pretty")(options "")(descr ""))
(lib (name "pcie")(type "KiCad")(uri "${KIPRJMOD}/kicad-libs/pcie.pretty")(options "")(descr ""))
(version 7)
(lib (name "usb")(type "KiCad")(uri "${KIPRJMOD}/extras/usb.pretty")(options "")(descr ""))
(lib (name "pcie")(type "KiCad")(uri "${KIPRJMOD}/extras/pcie.pretty")(options "")(descr ""))
)

12874
jlcpcb/gerber/backplane16pcie-CuBottom.gbr Normal file
View File

File diff suppressed because it is too large Load Diff

16526
jlcpcb/gerber/backplane16pcie-CuTop.gbr Normal file
View File

File diff suppressed because it is too large Load Diff

108
jlcpcb/gerber/backplane16pcie-EdgeCuts.gbr Normal file
View File

@@ -0,0 +1,108 @@
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467
jlcpcb/gerber/backplane16pcie-MaskBottom.gbr Normal file
View File

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542
jlcpcb/gerber/backplane16pcie-MaskTop.gbr Normal file
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@@ -0,0 +1,542 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.0*%
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%TF.SameCoordinates,Original*%
%TF.FileFunction,Soldermask,Top*%
%TF.FilePolarity,Negative*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 9.0.0) date 2025-04-02 13:07:30*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
G04 Aperture macros list*
%AMRoundRect*
0 Rectangle with rounded corners*
0 $1 Rounding radius*
0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
0 Add a 4 corners polygon primitive as box body*
4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
0 Add four circle primitives for the rounded corners*
1,1,$1+$1,$2,$3*
1,1,$1+$1,$4,$5*
1,1,$1+$1,$6,$7*
1,1,$1+$1,$8,$9*
0 Add four rect primitives between the rounded corners*
20,1,$1+$1,$2,$3,$4,$5,0*
20,1,$1+$1,$4,$5,$6,$7,0*
20,1,$1+$1,$6,$7,$8,$9,0*
20,1,$1+$1,$8,$9,$2,$3,0*%
G04 Aperture macros list end*
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%ADD11R,1.700000X1.700000*%
%ADD12O,1.700000X1.700000*%
%ADD13R,1.550000X1.300000*%
%ADD14C,1.700000*%
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%ADD27R,3.000000X0.700000*%
G04 APERTURE END LIST*
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2673
jlcpcb/gerber/backplane16pcie-SilkTop.gbr Normal file
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1
kicad-libs

Submodule kicad-libs deleted from 9b0caa418c

3
sym-lib-table
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@@ -1,4 +1,3 @@
(sym_lib_table
(lib (name "usb")(type "KiCad")(uri "${KIPRJMOD}/kicad-libs/usb.kicad_sym")(options "")(descr ""))
(lib (name "pcie")(type "KiCad")(uri "${KIPRJMOD}/kicad-libs/pcie.kicad_sym")(options "")(descr ""))
(version 7)
)