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moved exixe clock to its own repo

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dekunukem
2017-10-20 12:55:12 +01:00
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README.md
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# exixe: Low-cost miniature driver module for Nixie tubes
# exixe: Low-cost miniature Nixie tube driver modules
![Alt text](https://i.imgur.com/JjhNDUQ.jpg)
![Alt text](https://i.imgur.com/I1maqhw.jpg)
exixe is a driver module for IN-12 and IN-14 Nixie tubes, I developed them while building my own Nixie clock.
exixe is a miniature driver module for IN-12 and IN-14 Nixie tubes.
Instead of using obscure out-of-production driver chips, it uses a STM32 to handle digit display and dimming of all cathodes with hardware PWM. The module is controlled via standard SPI protocol, and has onboard RGB LED for backlight effects.
exixe is cheap, small and modular for easy integration. And because each tube has its own driver, there is no need for multiplexing, reducing the power consumption, simplifying the circuit design, increases perceived tube brightness, and prolongs the tube life.
## Features
Compared to the traditional approach, exixe board offers significant advantages:
Compared to the traditional approach, exixe modules offers significant advantages:
#### Small and modular
* 2x4 cm (0.79x1.57 inches)
@@ -17,7 +21,7 @@ Compared to the traditional approach, exixe board offers significant advantages:
#### Low-cost
* $3 in components
* No need for obscure vintage driver chips
* No need for expensive obscure vintage driver chips
#### SPI interface
* High speed, up to 24MHz SCLK
@@ -30,12 +34,13 @@ Compared to the traditional approach, exixe board offers significant advantages:
* Overdrive feature for poisoned cathodes
#### RGB backlight
* ...well because RGB
* Because RGB
#### No multiplexing
* Brighter display
* Longer tube life
* Simpler design
* Less power consumption
## Technical details

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exixe_clock/README.md
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![Alt text](https://i.imgur.com/JjhNDUQ.jpg)
under construction...

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exixe_clock/firmware/clock12/.mxproject
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exixe_clock/firmware/clock12/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
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exixe_clock/firmware/clock12/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
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/**
******************************************************************************
* @file stm32f0xx_hal_adc.h
* @author MCD Application Team
* @brief Header file containing functions prototypes of ADC HAL library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0xx_HAL_ADC_H
#define __STM32F0xx_HAL_ADC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal_def.h"
/** @addtogroup STM32F0xx_HAL_Driver
* @{
*/
/** @addtogroup ADC
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup ADC_Exported_Types ADC Exported Types
* @{
*/
/**
* @brief Structure definition of ADC initialization and regular group
* @note The setting of these parameters with function HAL_ADC_Init() is conditioned to ADC state.
* ADC state can be either:
* - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ClockPrescaler')
* - For all parameters except 'ClockPrescaler' and 'resolution': ADC enabled without conversion on going on regular group.
* If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
* without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
*/
typedef struct
{
uint32_t ClockPrescaler; /*!< Select ADC clock source (synchronous clock derived from APB clock or asynchronous clock derived from ADC dedicated HSI RC oscillator 14MHz) and clock prescaler.
This parameter can be a value of @ref ADC_ClockPrescaler
Note: In case of usage of the ADC dedicated HSI RC oscillator, it must be preliminarily enabled at RCC top level.
Note: This parameter can be modified only if the ADC is disabled */
uint32_t Resolution; /*!< Configures the ADC resolution.
This parameter can be a value of @ref ADC_Resolution */
uint32_t DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
This parameter can be a value of @ref ADC_Data_align */
uint32_t ScanConvMode; /*!< Configures the sequencer of regular group.
This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
Sequencer is automatically enabled if several channels are set (sequencer cannot be disabled, as it can be the case on other STM32 devices):
If only 1 channel is set: Conversion is performed in single mode.
If several channels are set: Conversions are performed in sequence mode (ranks defined by each channel number: channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
Scan direction can be set to forward (from channel 0 to channel 18) or backward (from channel 18 to channel 0).
This parameter can be a value of @ref ADC_Scan_mode */
uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
This parameter can be a value of @ref ADC_EOCSelection. */
uint32_t LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: new conversion start only when the previous
conversion (for regular group) has been treated by user software, using function HAL_ADC_GetValue().
This feature automatically adapts the ADC conversions trigs to the speed of the system that reads the data. Moreover, this avoids risk of overrun for low frequency applications.
This parameter can be set to ENABLE or DISABLE.
Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()) since they have to clear immediately the EOC flag to free the IRQ vector sequencer.
Do use with polling: 1. Start conversion with HAL_ADC_Start(), 2. Later on, when conversion data is needed: use HAL_ADC_PollForConversion() to ensure that conversion is completed
and use HAL_ADC_GetValue() to retrieve conversion result and trig another conversion. */
uint32_t LowPowerAutoPowerOff; /*!< Selects the auto-off mode: the ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered (with startup time between trigger and start of sampling).
This feature can be combined with automatic wait mode (parameter 'LowPowerAutoWait').
This parameter can be set to ENABLE or DISABLE.
Note: If enabled, this feature also turns off the ADC dedicated 14 MHz RC oscillator (HSI14) */
uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
after the selected trigger occurred (software start or external trigger).
This parameter can be set to ENABLE or DISABLE. */
uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
This parameter can be set to ENABLE or DISABLE
Note: Number of discontinuous ranks increment is fixed to one-by-one. */
uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
If set to ADC_SOFTWARE_START, external triggers are disabled.
This parameter can be a value of @ref ADC_External_trigger_source_Regular */
uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
This parameter can be a value of @ref ADC_External_trigger_edge_Regular */
uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
This parameter can be set to ENABLE or DISABLE. */
uint32_t Overrun; /*!< Select the behaviour in case of overrun: data preserved or overwritten
This parameter has an effect on regular group only, including in DMA mode.
This parameter can be a value of @ref ADC_Overrun */
uint32_t SamplingTimeCommon; /*!< Sampling time value to be set for the selected channel.
Unit: ADC clock cycles
Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits).
Note: On STM32F0 devices, the sampling time setting is common to all channels. On some other STM32 devices, this parameter in channel wise and is located into ADC channel initialization structure.
This parameter can be a value of @ref ADC_sampling_times
Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17us). */
}ADC_InitTypeDef;
/**
* @brief Structure definition of ADC channel for regular group
* @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned to ADC state.
* ADC state can be either:
* - For all parameters: ADC disabled or enabled without conversion on going on regular group.
* If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
* without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly).
*/
typedef struct
{
uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group.
This parameter can be a value of @ref ADC_channels
Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
uint32_t Rank; /*!< Add or remove the channel from ADC regular group sequencer.
On STM32F0 devices, number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...)..
Despite the channel rank is fixed, this parameter allow an additional possibility: to remove the selected rank (selected channel) from sequencer.
This parameter can be a value of @ref ADC_rank */
uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel.
Unit: ADC clock cycles
Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits).
This parameter can be a value of @ref ADC_sampling_times
Caution: this setting impacts the entire regular group. Therefore, call of HAL_ADC_ConfigChannel() to configure a channel can impact the configuration of other channels previously set.
Caution: Obsolete parameter. Use parameter "SamplingTimeCommon" in ADC initialization structure.
If parameter "SamplingTimeCommon" is set to a valid sampling time, parameter "SamplingTime" is discarded.
Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17us). */
}ADC_ChannelConfTypeDef;
/**
* @brief Structure definition of ADC analog watchdog
* @note The setting of these parameters with function HAL_ADC_AnalogWDGConfig() is conditioned to ADC state.
* ADC state can be either: ADC disabled or ADC enabled without conversion on going on regular group.
*/
typedef struct
{
uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all/none channels.
This parameter can be a value of @ref ADC_analog_watchdog_mode. */
uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
This parameter has an effect only if parameter 'WatchdogMode' is configured on single channel. Only 1 channel can be monitored.
This parameter can be a value of @ref ADC_channels. */
uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
This parameter can be set to ENABLE or DISABLE */
uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
}ADC_AnalogWDGConfTypeDef;
/**
* @brief HAL ADC state machine: ADC states definition (bitfields)
* @note ADC state machine is managed by bitfields, state must be compared
* with bit by bit.
* For example:
* " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
* " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) "
*/
/* States of ADC global scope */
#define HAL_ADC_STATE_RESET (0x00000000U) /*!< ADC not yet initialized or disabled */
#define HAL_ADC_STATE_READY (0x00000001U) /*!< ADC peripheral ready for use */
#define HAL_ADC_STATE_BUSY_INTERNAL (0x00000002U) /*!< ADC is busy to internal process (initialization, calibration) */
#define HAL_ADC_STATE_TIMEOUT (0x00000004U) /*!< TimeOut occurrence */
/* States of ADC errors */
#define HAL_ADC_STATE_ERROR_INTERNAL (0x00000010U) /*!< Internal error occurrence */
#define HAL_ADC_STATE_ERROR_CONFIG (0x00000020U) /*!< Configuration error occurrence */
#define HAL_ADC_STATE_ERROR_DMA (0x00000040U) /*!< DMA error occurrence */
/* States of ADC group regular */
#define HAL_ADC_STATE_REG_BUSY (0x00000100U) /*!< A conversion on group regular is ongoing or can occur (either by continuous mode,
external trigger, low power auto power-on, multimode ADC master control) */
#define HAL_ADC_STATE_REG_EOC (0x00000200U) /*!< Conversion data available on group regular */
#define HAL_ADC_STATE_REG_OVR (0x00000400U) /*!< Overrun occurrence */
#define HAL_ADC_STATE_REG_EOSMP (0x00000800U) /*!< Not available on STM32F0 device: End Of Sampling flag raised */
/* States of ADC group injected */
#define HAL_ADC_STATE_INJ_BUSY (0x00001000U) /*!< Not available on STM32F0 device: A conversion on group injected is ongoing or can occur (either by auto-injection mode,
external trigger, low power auto power-on, multimode ADC master control) */
#define HAL_ADC_STATE_INJ_EOC (0x00002000U) /*!< Not available on STM32F0 device: Conversion data available on group injected */
#define HAL_ADC_STATE_INJ_JQOVF (0x00004000U) /*!< Not available on STM32F0 device: Not available on STM32F0 device: Injected queue overflow occurrence */
/* States of ADC analog watchdogs */
#define HAL_ADC_STATE_AWD1 (0x00010000U) /*!< Out-of-window occurrence of analog watchdog 1 */
#define HAL_ADC_STATE_AWD2 (0x00020000U) /*!< Not available on STM32F0 device: Out-of-window occurrence of analog watchdog 2 */
#define HAL_ADC_STATE_AWD3 (0x00040000U) /*!< Not available on STM32F0 device: Out-of-window occurrence of analog watchdog 3 */
/* States of ADC multi-mode */
#define HAL_ADC_STATE_MULTIMODE_SLAVE (0x00100000U) /*!< Not available on STM32F0 device: ADC in multimode slave state, controlled by another ADC master ( */
/**
* @brief ADC handle Structure definition
*/
typedef struct
{
ADC_TypeDef *Instance; /*!< Register base address */
ADC_InitTypeDef Init; /*!< ADC required parameters */
DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
HAL_LockTypeDef Lock; /*!< ADC locking object */
__IO uint32_t State; /*!< ADC communication state (bitmap of ADC states) */
__IO uint32_t ErrorCode; /*!< ADC Error code */
}ADC_HandleTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup ADC_Exported_Constants ADC Exported Constants
* @{
*/
/** @defgroup ADC_Error_Code ADC Error Code
* @{
*/
#define HAL_ADC_ERROR_NONE (0x00U) /*!< No error */
#define HAL_ADC_ERROR_INTERNAL (0x01U) /*!< ADC IP internal error: if problem of clocking,
enable/disable, erroneous state */
#define HAL_ADC_ERROR_OVR (0x02U) /*!< Overrun error */
#define HAL_ADC_ERROR_DMA (0x04U) /*!< DMA transfer error */
/**
* @}
*/
/** @defgroup ADC_ClockPrescaler ADC ClockPrescaler
* @{
*/
#define ADC_CLOCK_ASYNC_DIV1 (0x00000000U) /*!< ADC asynchronous clock derived from ADC dedicated HSI */
#define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CFGR2_CKMODE_0) /*!< ADC synchronous clock derived from AHB clock divided by a prescaler of 2 */
#define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< ADC synchronous clock derived from AHB clock divided by a prescaler of 4 */
/**
* @}
*/
/** @defgroup ADC_Resolution ADC Resolution
* @{
*/
#define ADC_RESOLUTION_12B (0x00000000U) /*!< ADC 12-bit resolution */
#define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR1_RES_0) /*!< ADC 10-bit resolution */
#define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR1_RES_1) /*!< ADC 8-bit resolution */
#define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR1_RES) /*!< ADC 6-bit resolution */
/**
* @}
*/
/** @defgroup ADC_Data_align ADC Data_align
* @{
*/
#define ADC_DATAALIGN_RIGHT (0x00000000U)
#define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR1_ALIGN)
/**
* @}
*/
/** @defgroup ADC_Scan_mode ADC Scan mode
* @{
*/
/* Note: Scan mode values must be compatible with other STM32 devices having */
/* a configurable sequencer. */
/* Scan direction setting values are defined by taking in account */
/* already defined values for other STM32 devices: */
/* ADC_SCAN_DISABLE (0x00000000U) */
/* ADC_SCAN_ENABLE (0x00000001U) */
/* Scan direction forward is considered as default setting equivalent */
/* to scan enable. */
/* Scan direction backward is considered as additional setting. */
/* In case of migration from another STM32 device, the user will be */
/* warned of change of setting choices with assert check. */
#define ADC_SCAN_DIRECTION_FORWARD (0x00000001U) /*!< Scan direction forward: from channel 0 to channel 18 */
#define ADC_SCAN_DIRECTION_BACKWARD (0x00000002U) /*!< Scan direction backward: from channel 18 to channel 0 */
#define ADC_SCAN_ENABLE ADC_SCAN_DIRECTION_FORWARD /* For compatibility with other STM32 devices */
/**
* @}
*/
/** @defgroup ADC_External_trigger_edge_Regular ADC External trigger edge Regular
* @{
*/
#define ADC_EXTERNALTRIGCONVEDGE_NONE (0x00000000U)
#define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR1_EXTEN_0)
#define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR1_EXTEN_1)
#define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN)
/**
* @}
*/
/** @defgroup ADC_EOCSelection ADC EOCSelection
* @{
*/
#define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC)
#define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS)
/**
* @}
*/
/** @defgroup ADC_Overrun ADC Overrun
* @{
*/
#define ADC_OVR_DATA_OVERWRITTEN (0x00000000U)
#define ADC_OVR_DATA_PRESERVED (0x00000001U)
/**
* @}
*/
/** @defgroup ADC_rank ADC rank
* @{
*/
#define ADC_RANK_CHANNEL_NUMBER (0x00001000U) /*!< Enable the rank of the selected channels. Number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...) */
#define ADC_RANK_NONE (0x00001001U) /*!< Disable the selected rank (selected channel) from sequencer */
/**
* @}
*/
/** @defgroup ADC_sampling_times ADC sampling times
* @{
*/
/* Note: Parameter "ADC_SAMPLETIME_1CYCLE_5" defined with a dummy bit */
/* to distinguish this parameter versus reset value 0x00000000, */
/* in the context of management of parameters "SamplingTimeCommon" */
/* and "SamplingTime" (obsolete)). */
#define ADC_SAMPLETIME_1CYCLE_5 (0x10000000U) /*!< Sampling time 1.5 ADC clock cycle */
#define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t) ADC_SMPR_SMP_0) /*!< Sampling time 7.5 ADC clock cycles */
#define ADC_SAMPLETIME_13CYCLES_5 ((uint32_t) ADC_SMPR_SMP_1) /*!< Sampling time 13.5 ADC clock cycles */
#define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0)) /*!< Sampling time 28.5 ADC clock cycles */
#define ADC_SAMPLETIME_41CYCLES_5 ((uint32_t) ADC_SMPR_SMP_2) /*!< Sampling time 41.5 ADC clock cycles */
#define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_2 | ADC_SMPR_SMP_0)) /*!< Sampling time 55.5 ADC clock cycles */
#define ADC_SAMPLETIME_71CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1)) /*!< Sampling time 71.5 ADC clock cycles */
#define ADC_SAMPLETIME_239CYCLES_5 ((uint32_t) ADC_SMPR_SMP) /*!< Sampling time 239.5 ADC clock cycles */
/**
* @}
*/
/** @defgroup ADC_analog_watchdog_mode ADC analog watchdog mode
* @{
*/
#define ADC_ANALOGWATCHDOG_NONE ( 0x00000000U)
#define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN))
#define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR1_AWDEN)
/**
* @}
*/
/** @defgroup ADC_Event_type ADC Event type
* @{
*/
#define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD) /*!< ADC Analog watchdog 1 event */
#define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR) /*!< ADC overrun event */
/**
* @}
*/
/** @defgroup ADC_interrupts_definition ADC interrupts definition
* @{
*/
#define ADC_IT_AWD ADC_IER_AWDIE /*!< ADC Analog watchdog interrupt source */
#define ADC_IT_OVR ADC_IER_OVRIE /*!< ADC overrun interrupt source */
#define ADC_IT_EOS ADC_IER_EOSEQIE /*!< ADC End of Regular sequence of Conversions interrupt source */
#define ADC_IT_EOC ADC_IER_EOCIE /*!< ADC End of Regular Conversion interrupt source */
#define ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC End of Sampling interrupt source */
#define ADC_IT_RDY ADC_IER_ADRDYIE /*!< ADC Ready interrupt source */
/**
* @}
*/
/** @defgroup ADC_flags_definition ADC flags definition
* @{
*/
#define ADC_FLAG_AWD ADC_ISR_AWD /*!< ADC Analog watchdog flag */
#define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */
#define ADC_FLAG_EOS ADC_ISR_EOSEQ /*!< ADC End of Regular sequence of Conversions flag */
#define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */
#define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */
#define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready flag */
/**
* @}
*/
/**
* @}
*/
/* Private constants ---------------------------------------------------------*/
/** @addtogroup ADC_Private_Constants ADC Private Constants
* @{
*/
/** @defgroup ADC_Internal_HAL_driver_Ext_trig_src_Regular ADC Internal HAL driver Ext trig src Regular
* @{
*/
/* List of external triggers of regular group for ADC1: */
/* (used internally by HAL driver. To not use into HAL structure parameters) */
#define ADC1_2_EXTERNALTRIG_T1_TRGO (0x00000000U)
#define ADC1_2_EXTERNALTRIG_T1_CC4 ((uint32_t)ADC_CFGR1_EXTSEL_0)
#define ADC1_2_EXTERNALTRIG_T2_TRGO ((uint32_t)ADC_CFGR1_EXTSEL_1)
#define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0))
#define ADC1_2_EXTERNALTRIG_T15_TRGO ((uint32_t)ADC_CFGR1_EXTSEL_2)
/**
* @}
*/
/* Combination of all post-conversion flags bits: EOC/EOS, OVR, AWD */
#define ADC_FLAG_POSTCONV_ALL (ADC_FLAG_AWD | ADC_FLAG_OVR | ADC_FLAG_EOS | ADC_FLAG_EOC)
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup ADC_Exported_Macros ADC Exported Macros
* @{
*/
/* Macro for internal HAL driver usage, and possibly can be used into code of */
/* final user. */
/**
* @brief Enable the ADC peripheral
* @param __HANDLE__: ADC handle
* @retval None
*/
#define __HAL_ADC_ENABLE(__HANDLE__) \
((__HANDLE__)->Instance->CR |= ADC_CR_ADEN)
/**
* @brief Disable the ADC peripheral
* @param __HANDLE__: ADC handle
* @retval None
*/
#define __HAL_ADC_DISABLE(__HANDLE__) \
do{ \
(__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \
__HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \
} while(0)
/**
* @brief Enable the ADC end of conversion interrupt.
* @param __HANDLE__: ADC handle
* @param __INTERRUPT__: ADC Interrupt
* This parameter can be any combination of the following values:
* @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
* @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source
* @arg ADC_IT_AWD: ADC Analog watchdog interrupt source
* @arg ADC_IT_OVR: ADC overrun interrupt source
* @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source
* @arg ADC_IT_RDY: ADC Ready interrupt source
* @retval None
*/
#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
(((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
/**
* @brief Disable the ADC end of conversion interrupt.
* @param __HANDLE__: ADC handle
* @param __INTERRUPT__: ADC Interrupt
* This parameter can be any combination of the following values:
* @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
* @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source
* @arg ADC_IT_AWD: ADC Analog watchdog interrupt source
* @arg ADC_IT_OVR: ADC overrun interrupt source
* @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source
* @arg ADC_IT_RDY: ADC Ready interrupt source
* @retval None
*/
#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
(((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
/** @brief Checks if the specified ADC interrupt source is enabled or disabled.
* @param __HANDLE__: ADC handle
* @param __INTERRUPT__: ADC interrupt source to check
* This parameter can be any combination of the following values:
* @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
* @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source
* @arg ADC_IT_AWD: ADC Analog watchdog interrupt source
* @arg ADC_IT_OVR: ADC overrun interrupt source
* @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source
* @arg ADC_IT_RDY: ADC Ready interrupt source
* @retval State ofinterruption (SET or RESET)
*/
#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
(((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__))
/**
* @brief Get the selected ADC's flag status.
* @param __HANDLE__: ADC handle
* @param __FLAG__: ADC flag
* This parameter can be any combination of the following values:
* @arg ADC_FLAG_EOC: ADC End of Regular conversion flag
* @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag
* @arg ADC_FLAG_AWD: ADC Analog watchdog flag
* @arg ADC_FLAG_OVR: ADC overrun flag
* @arg ADC_FLAG_EOSMP: ADC End of Sampling flag
* @arg ADC_FLAG_RDY: ADC Ready flag
* @retval None
*/
#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) \
((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
/**
* @brief Clear the ADC's pending flags
* @param __HANDLE__: ADC handle
* @param __FLAG__: ADC flag
* This parameter can be any combination of the following values:
* @arg ADC_FLAG_EOC: ADC End of Regular conversion flag
* @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag
* @arg ADC_FLAG_AWD: ADC Analog watchdog flag
* @arg ADC_FLAG_OVR: ADC overrun flag
* @arg ADC_FLAG_EOSMP: ADC End of Sampling flag
* @arg ADC_FLAG_RDY: ADC Ready flag
* @retval None
*/
/* Note: bit cleared bit by writing 1 (writing 0 has no effect on any bit of register ISR) */
#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) \
(((__HANDLE__)->Instance->ISR) = (__FLAG__))
/** @brief Reset ADC handle state
* @param __HANDLE__: ADC handle
* @retval None
*/
#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) \
((__HANDLE__)->State = HAL_ADC_STATE_RESET)
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/** @defgroup ADC_Private_Macros ADC Private Macros
* @{
*/
/* Macro reserved for internal HAL driver usage, not intended to be used in */
/* code of final user. */
/**
* @brief Verification of hardware constraints before ADC can be enabled
* @param __HANDLE__: ADC handle
* @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled)
*/
#define ADC_ENABLING_CONDITIONS(__HANDLE__) \
(( ( ((__HANDLE__)->Instance->CR) & \
(ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) \
) == RESET \
) ? SET : RESET)
/**
* @brief Verification of hardware constraints before ADC can be disabled
* @param __HANDLE__: ADC handle
* @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled)
*/
#define ADC_DISABLING_CONDITIONS(__HANDLE__) \
(( ( ((__HANDLE__)->Instance->CR) & \
(ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \
) ? SET : RESET)
/**
* @brief Verification of ADC state: enabled or disabled
* @param __HANDLE__: ADC handle
* @retval SET (ADC enabled) or RESET (ADC disabled)
*/
/* Note: If low power mode AutoPowerOff is enabled, power-on/off phases are */
/* performed automatically by hardware and flag ADC_FLAG_RDY is not */
/* set. */
#define ADC_IS_ENABLE(__HANDLE__) \
(( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
(((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) || \
((((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_AUTOFF) == ADC_CFGR1_AUTOFF) ) \
) ? SET : RESET)
/**
* @brief Test if conversion trigger of regular group is software start
* or external trigger.
* @param __HANDLE__: ADC handle
* @retval SET (software start) or RESET (external trigger)
*/
#define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \
(((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_EXTEN) == RESET)
/**
* @brief Check if no conversion on going on regular group
* @param __HANDLE__: ADC handle
* @retval SET (conversion is on going) or RESET (no conversion is on going)
*/
#define ADC_IS_CONVERSION_ONGOING_REGULAR(__HANDLE__) \
(( (((__HANDLE__)->Instance->CR) & ADC_CR_ADSTART) == RESET \
) ? RESET : SET)
/**
* @brief Returns resolution bits in CFGR1 register: RES[1:0].
* Returned value is among parameters to @ref ADC_Resolution.
* @param __HANDLE__: ADC handle
* @retval None
*/
#define ADC_GET_RESOLUTION(__HANDLE__) \
(((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES)
/**
* @brief Returns ADC sample time bits in SMPR register: SMP[2:0].
* Returned value is among parameters to @ref ADC_Resolution.
* @param __HANDLE__: ADC handle
* @retval None
*/
#define ADC_GET_SAMPLINGTIME(__HANDLE__) \
(((__HANDLE__)->Instance->SMPR) & ADC_SMPR_SMP)
/**
* @brief Simultaneously clears and sets specific bits of the handle State
* @note: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(),
* the first parameter is the ADC handle State, the second parameter is the
* bit field to clear, the third and last parameter is the bit field to set.
* @retval None
*/
#define ADC_STATE_CLR_SET MODIFY_REG
/**
* @brief Clear ADC error code (set it to error code: "no error")
* @param __HANDLE__: ADC handle
* @retval None
*/
#define ADC_CLEAR_ERRORCODE(__HANDLE__) \
((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
/**
* @brief Configure the channel number into channel selection register
* @param _CHANNEL_: ADC Channel
* @retval None
*/
/* This function converts ADC channels from numbers (see defgroup ADC_channels)
to bitfields, to get the equivalence of CMSIS channels:
ADC_CHANNEL_0 ((uint32_t) ADC_CHSELR_CHSEL0)
ADC_CHANNEL_1 ((uint32_t) ADC_CHSELR_CHSEL1)
ADC_CHANNEL_2 ((uint32_t) ADC_CHSELR_CHSEL2)
ADC_CHANNEL_3 ((uint32_t) ADC_CHSELR_CHSEL3)
ADC_CHANNEL_4 ((uint32_t) ADC_CHSELR_CHSEL4)
ADC_CHANNEL_5 ((uint32_t) ADC_CHSELR_CHSEL5)
ADC_CHANNEL_6 ((uint32_t) ADC_CHSELR_CHSEL6)
ADC_CHANNEL_7 ((uint32_t) ADC_CHSELR_CHSEL7)
ADC_CHANNEL_8 ((uint32_t) ADC_CHSELR_CHSEL8)
ADC_CHANNEL_9 ((uint32_t) ADC_CHSELR_CHSEL9)
ADC_CHANNEL_10 ((uint32_t) ADC_CHSELR_CHSEL10)
ADC_CHANNEL_11 ((uint32_t) ADC_CHSELR_CHSEL11)
ADC_CHANNEL_12 ((uint32_t) ADC_CHSELR_CHSEL12)
ADC_CHANNEL_13 ((uint32_t) ADC_CHSELR_CHSEL13)
ADC_CHANNEL_14 ((uint32_t) ADC_CHSELR_CHSEL14)
ADC_CHANNEL_15 ((uint32_t) ADC_CHSELR_CHSEL15)
ADC_CHANNEL_16 ((uint32_t) ADC_CHSELR_CHSEL16)
ADC_CHANNEL_17 ((uint32_t) ADC_CHSELR_CHSEL17)
ADC_CHANNEL_18 ((uint32_t) ADC_CHSELR_CHSEL18)
*/
#define ADC_CHSELR_CHANNEL(_CHANNEL_) \
( 1U << (_CHANNEL_))
/**
* @brief Set the ADC's sample time
* @param _SAMPLETIME_: Sample time parameter.
* @retval None
*/
/* Note: ADC sampling time set using mask ADC_SMPR_SMP due to parameter */
/* "ADC_SAMPLETIME_1CYCLE_5" defined with a dummy bit (bit used to */
/* distinguish this parameter versus reset value 0x00000000, */
/* in the context of management of parameters "SamplingTimeCommon" */
/* and "SamplingTime" (obsolete)). */
#define ADC_SMPR_SET(_SAMPLETIME_) \
((_SAMPLETIME_) & (ADC_SMPR_SMP))
/**
* @brief Set the Analog Watchdog 1 channel.
* @param _CHANNEL_: channel to be monitored by Analog Watchdog 1.
* @retval None
*/
#define ADC_CFGR_AWDCH(_CHANNEL_) \
((_CHANNEL_) << 26U)
/**
* @brief Enable ADC discontinuous conversion mode for regular group
* @param _REG_DISCONTINUOUS_MODE_: Regular discontinuous mode.
* @retval None
*/
#define ADC_CFGR1_REG_DISCCONTINUOUS(_REG_DISCONTINUOUS_MODE_) \
((_REG_DISCONTINUOUS_MODE_) << 16U)
/**
* @brief Enable the ADC auto off mode.
* @param _AUTOOFF_: Auto off bit enable or disable.
* @retval None
*/
#define ADC_CFGR1_AUTOOFF(_AUTOOFF_) \
((_AUTOOFF_) << 15U)
/**
* @brief Enable the ADC auto delay mode.
* @param _AUTOWAIT_: Auto delay bit enable or disable.
* @retval None
*/
#define ADC_CFGR1_AUTOWAIT(_AUTOWAIT_) \
((_AUTOWAIT_) << 14U)
/**
* @brief Enable ADC continuous conversion mode.
* @param _CONTINUOUS_MODE_: Continuous mode.
* @retval None
*/
#define ADC_CFGR1_CONTINUOUS(_CONTINUOUS_MODE_) \
((_CONTINUOUS_MODE_) << 13U)
/**
* @brief Enable ADC overrun mode.
* @param _OVERRUN_MODE_: Overrun mode.
* @retval Overun bit setting to be programmed into CFGR register
*/
/* Note: Bit ADC_CFGR1_OVRMOD not used directly in constant */
/* "ADC_OVR_DATA_OVERWRITTEN" to have this case defined to 0x00, to set it */
/* as the default case to be compliant with other STM32 devices. */
#define ADC_CFGR1_OVERRUN(_OVERRUN_MODE_) \
( ( (_OVERRUN_MODE_) != (ADC_OVR_DATA_PRESERVED) \
)? (ADC_CFGR1_OVRMOD) : (0x00000000) \
)
/**
* @brief Enable ADC scan mode to convert multiple ranks with sequencer.
* @param _SCAN_MODE_: Scan conversion mode.
* @retval None
*/
/* Note: Scan mode set using this macro (instead of parameter direct set) */
/* due to different modes on other STM32 devices: to avoid any */
/* unwanted setting, the exact parameter corresponding to the device */
/* must be passed to this macro. */
#define ADC_SCANDIR(_SCAN_MODE_) \
( ( (_SCAN_MODE_) == (ADC_SCAN_DIRECTION_BACKWARD) \
)? (ADC_CFGR1_SCANDIR) : (0x00000000) \
)
/**
* @brief Enable the ADC DMA continuous request.
* @param _DMACONTREQ_MODE_: DMA continuous request mode.
* @retval None
*/
#define ADC_CFGR1_DMACONTREQ(_DMACONTREQ_MODE_) \
((_DMACONTREQ_MODE_) << 1U)
/**
* @brief Configure the analog watchdog high threshold into register TR.
* @param _Threshold_: Threshold value
* @retval None
*/
#define ADC_TRX_HIGHTHRESHOLD(_Threshold_) \
((_Threshold_) << 16U)
/**
* @brief Shift the AWD threshold in function of the selected ADC resolution.
* Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0.
* If resolution 12 bits, no shift.
* If resolution 10 bits, shift of 2 ranks on the left.
* If resolution 8 bits, shift of 4 ranks on the left.
* If resolution 6 bits, shift of 6 ranks on the left.
* therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
* @param __HANDLE__: ADC handle
* @param _Threshold_: Value to be shifted
* @retval None
*/
#define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, _Threshold_) \
((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3U)*2))
#define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) || \
((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) )
#define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \
((RESOLUTION) == ADC_RESOLUTION_10B) || \
((RESOLUTION) == ADC_RESOLUTION_8B) || \
((RESOLUTION) == ADC_RESOLUTION_6B) )
#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
((ALIGN) == ADC_DATAALIGN_LEFT) )
#define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DIRECTION_FORWARD) || \
((SCAN_MODE) == ADC_SCAN_DIRECTION_BACKWARD) )
#define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \
((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \
((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING) )
#define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == ADC_EOC_SINGLE_CONV) || \
((EOC_SELECTION) == ADC_EOC_SEQ_CONV) )
#define IS_ADC_OVERRUN(OVR) (((OVR) == ADC_OVR_DATA_PRESERVED) || \
((OVR) == ADC_OVR_DATA_OVERWRITTEN) )
#define IS_ADC_RANK(WATCHDOG) (((WATCHDOG) == ADC_RANK_CHANNEL_NUMBER) || \
((WATCHDOG) == ADC_RANK_NONE) )
#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5) || \
((TIME) == ADC_SAMPLETIME_7CYCLES_5) || \
((TIME) == ADC_SAMPLETIME_13CYCLES_5) || \
((TIME) == ADC_SAMPLETIME_28CYCLES_5) || \
((TIME) == ADC_SAMPLETIME_41CYCLES_5) || \
((TIME) == ADC_SAMPLETIME_55CYCLES_5) || \
((TIME) == ADC_SAMPLETIME_71CYCLES_5) || \
((TIME) == ADC_SAMPLETIME_239CYCLES_5) )
#define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE) || \
((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG) )
#define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \
((EVENT) == ADC_OVR_EVENT) )
/** @defgroup ADC_range_verification ADC range verification
* in function of ADC resolution selected (12, 10, 8 or 6 bits)
* @{
*/
#define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= (0x0FFFU))) || \
(((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= (0x03FFU))) || \
(((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= (0x00FFU))) || \
(((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= (0x003FU))) )
/**
* @}
*/
/** @defgroup ADC_regular_rank_verification ADC regular rank verification
* @{
*/
#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= (1U)) && ((RANK) <= (16U)))
/**
* @}
*/
/**
* @}
*/
/* Include ADC HAL Extension module */
#include "stm32f0xx_hal_adc_ex.h"
/* Exported functions --------------------------------------------------------*/
/** @addtogroup ADC_Exported_Functions
* @{
*/
/** @addtogroup ADC_Exported_Functions_Group1
* @{
*/
/* Initialization and de-initialization functions **********************************/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
/**
* @}
*/
/* IO operation functions *****************************************************/
/** @addtogroup ADC_Exported_Functions_Group2
* @{
*/
/* Blocking mode: Polling */
HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
/* Non-blocking mode: Interruption */
HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
/* Non-blocking mode: DMA */
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
/* ADC retrieve conversion value intended to be used with polling or interruption */
uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
/**
* @}
*/
/* Peripheral Control functions ***********************************************/
/** @addtogroup ADC_Exported_Functions_Group3
* @{
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
/**
* @}
*/
/* Peripheral State functions *************************************************/
/** @addtogroup ADC_Exported_Functions_Group4
* @{
*/
uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F0xx_HAL_ADC_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

315
exixe_clock/firmware/clock12/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
View File

@@ -1,315 +0,0 @@
/**
******************************************************************************
* @file stm32f0xx_hal_adc_ex.h
* @author MCD Application Team
* @brief Header file of ADC HAL Extension module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0xx_HAL_ADC_EX_H
#define __STM32F0xx_HAL_ADC_EX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal_def.h"
/** @addtogroup STM32F0xx_HAL_Driver
* @{
*/
/** @addtogroup ADCEx
* @{
*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup ADC_Exported_Constants ADC Exported Constants
* @{
*/
#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
#define ADC_CCR_ALL (ADC_CCR_VBATEN | ADC_CCR_TSEN | ADC_CCR_VREFEN)
#else
#define ADC_CCR_ALL (ADC_CCR_TSEN | ADC_CCR_VREFEN)
#endif
/** @defgroup ADC_External_trigger_source_Regular ADC External trigger source Regular
* @{
*/
/* List of external triggers with generic trigger name, sorted by trigger */
/* name: */
/* External triggers of regular group for ADC1 */
#define ADC_EXTERNALTRIGCONV_T1_TRGO ADC1_2_EXTERNALTRIG_T1_TRGO
#define ADC_EXTERNALTRIGCONV_T1_CC4 ADC1_2_EXTERNALTRIG_T1_CC4
#define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
#define ADC_SOFTWARE_START (ADC_CFGR1_EXTSEL + 1U)
#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
#define ADC_EXTERNALTRIGCONV_T2_TRGO ADC1_2_EXTERNALTRIG_T2_TRGO
#endif
#if !defined(STM32F030x6) && !defined(STM32F070x6) && !defined(STM32F042x6)
#define ADC_EXTERNALTRIGCONV_T15_TRGO ADC1_2_EXTERNALTRIG_T15_TRGO
#endif
/**
* @}
*/
/** @defgroup ADC_channels ADC channels
* @{
*/
/* Note: Depending on devices, some channels may not be available on package */
/* pins. Refer to device datasheet for channels availability. */
/* Note: Channels are used by bitfields for setting of channel selection */
/* (register ADC_CHSELR) and used by number for setting of analog */
/* watchdog channel (bits AWDCH in register ADC_CFGR1). */
/* Channels are defined with decimal numbers and converted them to */
/* bitfields when needed. */
#define ADC_CHANNEL_0 ( 0x00000000U)
#define ADC_CHANNEL_1 ( 0x00000001U)
#define ADC_CHANNEL_2 ( 0x00000002U)
#define ADC_CHANNEL_3 ( 0x00000003U)
#define ADC_CHANNEL_4 ( 0x00000004U)
#define ADC_CHANNEL_5 ( 0x00000005U)
#define ADC_CHANNEL_6 ( 0x00000006U)
#define ADC_CHANNEL_7 ( 0x00000007U)
#define ADC_CHANNEL_8 ( 0x00000008U)
#define ADC_CHANNEL_9 ( 0x00000009U)
#define ADC_CHANNEL_10 ( 0x0000000AU)
#define ADC_CHANNEL_11 ( 0x0000000BU)
#define ADC_CHANNEL_12 ( 0x0000000CU)
#define ADC_CHANNEL_13 ( 0x0000000DU)
#define ADC_CHANNEL_14 ( 0x0000000EU)
#define ADC_CHANNEL_15 ( 0x0000000FU)
#define ADC_CHANNEL_16 ( 0x00000010U)
#define ADC_CHANNEL_17 ( 0x00000011U)
#define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_16
#define ADC_CHANNEL_VREFINT ADC_CHANNEL_17
#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
#define ADC_CHANNEL_18 ( 0x00000012U)
#define ADC_CHANNEL_VBAT ADC_CHANNEL_18
#endif
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup ADCEx_Private_Macros ADCEx Private Macros
* @{
*/
/* Macro reserved for internal HAL driver usage, not intended to be used in */
/* code of final user. */
/**
* @brief Test if the selected ADC channel is an internal channel
* VrefInt/TempSensor/Vbat
* Note: On STM32F0, availability of internal channel Vbat depends on
* devices lines.
* @param __CHANNEL__: ADC channel
* @retval None
*/
#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
#define ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
(((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \
((__CHANNEL__) == ADC_CHANNEL_VREFINT) || \
((__CHANNEL__) == ADC_CHANNEL_VBAT) \
)
#else
#define ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
(((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \
((__CHANNEL__) == ADC_CHANNEL_VREFINT) \
)
#endif
/**
* @brief Select the internal measurement path to be enabled/disabled
* corresponding to the selected ADC internal channel
* VrefInt/TempSensor/Vbat.
* Note: On STM32F0, availability of internal channel Vbat depends on
* devices lines.
* @param __CHANNEL__: ADC channel
* @retval Bit of register ADC_CCR
*/
#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
#define ADC_CHANNEL_INTERNAL_PATH(__CHANNEL__) \
(( (__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR \
)? \
(ADC_CCR_TSEN) \
: \
( \
( (__CHANNEL__) == ADC_CHANNEL_VREFINT \
)? \
(ADC_CCR_VREFEN) \
: \
(ADC_CCR_VBATEN) \
) \
)
#else
#define ADC_CHANNEL_INTERNAL_PATH(__CHANNEL__) \
(( (__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR \
)? \
(ADC_CCR_TSEN) \
: \
(ADC_CCR_VREFEN) \
)
#endif
#if defined (STM32F030x6) || defined (STM32F070x6)
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
((REGTRIG) == ADC_SOFTWARE_START))
#elif defined (STM32F042x6)
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
((REGTRIG) == ADC_SOFTWARE_START))
#elif defined (STM32F030xC) || defined (STM32F070xB) || defined (STM32F030x8)
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T15_TRGO) || \
((REGTRIG) == ADC_SOFTWARE_START))
#else
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
((REGTRIG) == ADC_EXTERNALTRIGCONV_T15_TRGO) || \
((REGTRIG) == ADC_SOFTWARE_START))
#endif
#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \
((CHANNEL) == ADC_CHANNEL_1) || \
((CHANNEL) == ADC_CHANNEL_2) || \
((CHANNEL) == ADC_CHANNEL_3) || \
((CHANNEL) == ADC_CHANNEL_4) || \
((CHANNEL) == ADC_CHANNEL_5) || \
((CHANNEL) == ADC_CHANNEL_6) || \
((CHANNEL) == ADC_CHANNEL_7) || \
((CHANNEL) == ADC_CHANNEL_8) || \
((CHANNEL) == ADC_CHANNEL_9) || \
((CHANNEL) == ADC_CHANNEL_10) || \
((CHANNEL) == ADC_CHANNEL_11) || \
((CHANNEL) == ADC_CHANNEL_12) || \
((CHANNEL) == ADC_CHANNEL_13) || \
((CHANNEL) == ADC_CHANNEL_14) || \
((CHANNEL) == ADC_CHANNEL_15) || \
((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \
((CHANNEL) == ADC_CHANNEL_VREFINT) || \
((CHANNEL) == ADC_CHANNEL_VBAT) )
#else
#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \
((CHANNEL) == ADC_CHANNEL_1) || \
((CHANNEL) == ADC_CHANNEL_2) || \
((CHANNEL) == ADC_CHANNEL_3) || \
((CHANNEL) == ADC_CHANNEL_4) || \
((CHANNEL) == ADC_CHANNEL_5) || \
((CHANNEL) == ADC_CHANNEL_6) || \
((CHANNEL) == ADC_CHANNEL_7) || \
((CHANNEL) == ADC_CHANNEL_8) || \
((CHANNEL) == ADC_CHANNEL_9) || \
((CHANNEL) == ADC_CHANNEL_10) || \
((CHANNEL) == ADC_CHANNEL_11) || \
((CHANNEL) == ADC_CHANNEL_12) || \
((CHANNEL) == ADC_CHANNEL_13) || \
((CHANNEL) == ADC_CHANNEL_14) || \
((CHANNEL) == ADC_CHANNEL_15) || \
((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \
((CHANNEL) == ADC_CHANNEL_VREFINT) )
#endif
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup ADCEx_Exported_Functions
* @{
*/
/* IO operation functions *****************************************************/
/** @addtogroup ADCEx_Exported_Functions_Group1
* @{
*/
/* ADC calibration */
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F0xx_HAL_ADC_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

835
exixe_clock/firmware/clock12/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
View File

@@ -1,835 +0,0 @@
/**
******************************************************************************
* @file stm32f0xx_hal_pcd.h
* @author MCD Application Team
* @brief Header file of PCD HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0xx_HAL_PCD_H
#define __STM32F0xx_HAL_PCD_H
#ifdef __cplusplus
extern "C" {
#endif
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)|| defined(STM32F070x6)
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal_def.h"
/** @addtogroup STM32F0xx_HAL_Driver
* @{
*/
/** @addtogroup PCD
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup PCD_Exported_Types PCD Exported Types
* @{
*/
/**
* @brief PCD State structure definition
*/
typedef enum
{
HAL_PCD_STATE_RESET = 0x00U,
HAL_PCD_STATE_READY = 0x01U,
HAL_PCD_STATE_ERROR = 0x02U,
HAL_PCD_STATE_BUSY = 0x03U,
HAL_PCD_STATE_TIMEOUT = 0x04U
} PCD_StateTypeDef;
/**
* @brief PCD double buffered endpoint direction
*/
typedef enum
{
PCD_EP_DBUF_OUT,
PCD_EP_DBUF_IN,
PCD_EP_DBUF_ERR,
}PCD_EP_DBUF_DIR;
/**
* @brief PCD endpoint buffer number
*/
typedef enum
{
PCD_EP_NOBUF,
PCD_EP_BUF0,
PCD_EP_BUF1
}PCD_EP_BUF_NUM;
/**
* @brief PCD Initialization Structure definition
*/
typedef struct
{
uint32_t dev_endpoints; /*!< Device Endpoints number.
This parameter depends on the used USB core.
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
uint32_t speed; /*!< USB Core speed.
This parameter can be any value of @ref PCD_Core_Speed */
uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
This parameter can be any value of @ref PCD_EP0_MPS */
uint32_t phy_itface; /*!< Select the used PHY interface.
This parameter can be any value of @ref PCD_Core_PHY */
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal.
This parameter can be set to ENABLE or DISABLE */
uint32_t low_power_enable; /*!< Enable or disable Low Power mode
This parameter can be set to ENABLE or DISABLE */
uint32_t lpm_enable; /*!< Enable or disable the Link Power Management .
This parameter can be set to ENABLE or DISABLE */
uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
This parameter can be set to ENABLE or DISABLE */
}PCD_InitTypeDef;
typedef struct
{
uint8_t num; /*!< Endpoint number
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
uint8_t is_in; /*!< Endpoint direction
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
uint8_t is_stall; /*!< Endpoint stall condition
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
uint8_t type; /*!< Endpoint type
This parameter can be any value of @ref PCD_EP_Type */
uint16_t pmaadress; /*!< PMA Address
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
uint16_t pmaaddr0; /*!< PMA Address0
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
uint16_t pmaaddr1; /*!< PMA Address1
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
uint8_t doublebuffer; /*!< Double buffer enable
This parameter can be 0 or 1 */
uint32_t maxpacket; /*!< Endpoint Max packet size
This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
uint32_t xfer_len; /*!< Current transfer length */
uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
}PCD_EPTypeDef;
typedef USB_TypeDef PCD_TypeDef;
/**
* @brief PCD Handle Structure definition
*/
typedef struct
{
PCD_TypeDef *Instance; /*!< Register base address */
PCD_InitTypeDef Init; /*!< PCD required parameters */
__IO uint8_t USB_Address; /*!< USB Address */
PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
HAL_LockTypeDef Lock; /*!< PCD peripheral status */
__IO PCD_StateTypeDef State; /*!< PCD communication state */
uint32_t Setup[12]; /*!< Setup packet buffer */
void *pData; /*!< Pointer to upper stack Handler */
} PCD_HandleTypeDef;
/**
* @}
*/
/* Include PCD HAL Extension module */
#include "stm32f0xx_hal_pcd_ex.h"
/* Exported constants --------------------------------------------------------*/
/** @defgroup PCD_Exported_Constants PCD Exported Constants
* @{
*/
/** @defgroup PCD_Core_Speed PCD Core Speed
* @{
*/
#define PCD_SPEED_HIGH 0 /* Not Supported */
#define PCD_SPEED_FULL 2
/**
* @}
*/
/** @defgroup PCD_Core_PHY PCD Core PHY
* @{
*/
#define PCD_PHY_EMBEDDED 2
/**
* @}
*/
/**
* @}
*/
/* Exported macros -----------------------------------------------------------*/
/** @defgroup PCD_Exported_Macros PCD Exported Macros
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__))))
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
#define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER |= (__EXTILINE__))
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup PCD_Exported_Functions PCD Exported Functions
* @{
*/
/* Initialization/de-initialization functions ********************************/
/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
* @{
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
/**
* @}
*/
/* I/O operation functions ***************************************************/
/* Non-Blocking mode: Interrupt */
/** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
* @{
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
/**
* @}
*/
/* Peripheral Control functions **********************************************/
/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
* @{
*/
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
/**
* @}
*/
/* Peripheral State functions ************************************************/
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
* @{
*/
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
/**
* @}
*/
/**
* @}
*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup PCD_Private_Constants PCD Private Constants
* @{
*/
/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
* @{
*/
#define USB_WAKEUP_EXTI_LINE ((uint32_t)EXTI_IMR_MR18) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
/**
* @}
*/
/** @defgroup PCD_EP0_MPS PCD EP0 MPS
* @{
*/
#define DEP0CTL_MPS_64 0
#define DEP0CTL_MPS_32 1
#define DEP0CTL_MPS_16 2
#define DEP0CTL_MPS_8 3
#define PCD_EP0MPS_64 DEP0CTL_MPS_64
#define PCD_EP0MPS_32 DEP0CTL_MPS_32
#define PCD_EP0MPS_16 DEP0CTL_MPS_16
#define PCD_EP0MPS_08 DEP0CTL_MPS_8
/**
* @}
*/
/** @defgroup PCD_EP_Type PCD EP Type
* @{
*/
#define PCD_EP_TYPE_CTRL 0
#define PCD_EP_TYPE_ISOC 1
#define PCD_EP_TYPE_BULK 2
#define PCD_EP_TYPE_INTR 3
/**
* @}
*/
/** @defgroup PCD_ENDP PCD ENDP
* @{
*/
#define PCD_ENDP0 ((uint8_t)0U)
#define PCD_ENDP1 ((uint8_t)1U)
#define PCD_ENDP2 ((uint8_t)2U)
#define PCD_ENDP3 ((uint8_t)3U)
#define PCD_ENDP4 ((uint8_t)4U)
#define PCD_ENDP5 ((uint8_t)5U)
#define PCD_ENDP6 ((uint8_t)6U)
#define PCD_ENDP7 ((uint8_t)7U)
/**
* @}
*/
/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
* @{
*/
#define PCD_SNG_BUF 0
#define PCD_DBL_BUF 1
/**
* @}
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup PCD_Private_Macros PCD Private Macros
* @{
*/
/* SetENDPOINT */
#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
/* GetENDPOINT */
#define PCD_GET_ENDPOINT(USBx, bEpNum) (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
/**
* @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param wType: Endpoint Type.
* @retval None
*/
#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType)) )))
/**
* @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval Endpoint Type
*/
#define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
/**
* @brief free buffer used from the application realizing it to the line
toggles bit SW_BUF in the double buffered endpoint register
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param bDir: Direction
* @retval None
*/
#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
{\
if ((bDir) == PCD_EP_DBUF_OUT)\
{ /* OUT double buffered endpoint */\
PCD_TX_DTOG((USBx), (bEpNum));\
}\
else if ((bDir) == PCD_EP_DBUF_IN)\
{ /* IN double buffered endpoint */\
PCD_RX_DTOG((USBx), (bEpNum));\
}\
}
/**
* @brief gets direction of the double buffered endpoint
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval EP_DBUF_OUT, EP_DBUF_IN,
* EP_DBUF_ERR if the endpoint counter not yet programmed.
*/
#define PCD_GET_DB_DIR(USBx, bEpNum)\
{\
if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U)\
return(PCD_EP_DBUF_OUT);\
else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U)\
return(PCD_EP_DBUF_IN);\
else\
return(PCD_EP_DBUF_ERR);\
}
/**
* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param wState: new state
* @retval None
*/
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
\
_wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
/* toggle first bit ? */ \
if((USB_EPTX_DTOG1 & (wState))!= 0U)\
{ \
_wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \
} \
/* toggle second bit ? */ \
if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
{ \
_wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \
} \
PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\
} /* PCD_SET_EP_TX_STATUS */
/**
* @brief sets the status for rx transfer (bits STAT_TX[1:0])
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param wState: new state
* @retval None
*/
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
register uint16_t _wRegVal; \
\
_wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
/* toggle first bit ? */ \
if((USB_EPRX_DTOG1 & (wState))!= 0U) \
{ \
_wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \
} \
/* toggle second bit ? */ \
if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
{ \
_wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \
} \
PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
} /* PCD_SET_EP_RX_STATUS */
/**
* @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param wStaterx: new state.
* @param wStatetx: new state.
* @retval None
*/
#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
register uint32_t _wRegVal; \
\
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
/* toggle first bit ? */ \
if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
{ \
_wRegVal ^= USB_EPRX_DTOG1; \
} \
/* toggle second bit ? */ \
if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
{ \
_wRegVal ^= USB_EPRX_DTOG2; \
} \
/* toggle first bit ? */ \
if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
{ \
_wRegVal ^= USB_EPTX_DTOG1; \
} \
/* toggle second bit ? */ \
if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
{ \
_wRegVal ^= USB_EPTX_DTOG2; \
} \
PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
} /* PCD_SET_EP_TXRX_STATUS */
/**
* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
* /STAT_RX[1:0])
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval status
*/
#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_STAT)
#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_STAT)
/**
* @brief sets directly the VALID tx/rx-status into the endpoint register
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
/**
* @brief checks stall condition in an endpoint.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval TRUE = endpoint in stall condition.
*/
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
== USB_EP_TX_STALL)
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
== USB_EP_RX_STALL)
/**
* @brief set & clear EP_KIND bit.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
(USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK))))
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
(USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK))))
/**
* @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
/**
* @brief Sets/clears directly EP_KIND bit in the endpoint register.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
/**
* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
/**
* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
/**
* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
{ \
PCD_RX_DTOG((USBx),(bEpNum));\
}
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
{\
PCD_TX_DTOG((USBx),(bEpNum));\
}
/**
* @brief Sets address in an endpoint register.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param bAddr: Address.
* @retval None
*/
#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr))
/**
* @brief Gets address in an endpoint register.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400U)))))
#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400U)))))
#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400U)))))
#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400U)))))
/**
* @brief sets address of the tx/rx buffer.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param wAddr: address to be set (must be word aligned).
* @retval None
*/
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
/**
* @brief Gets address of the tx/rx buffer.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval address of the buffer.
*/
#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
/**
* @brief Sets counter of rx buffer with no. of blocks.
* @param dwReg: Register
* @param wCount: Counter.
* @param wNBlocks: no. of Blocks.
* @retval None
*/
#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
(wNBlocks) = (wCount) >> 5U;\
if(((wCount) & 0x1fU) == 0U)\
{ \
(wNBlocks)--;\
} \
*pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \
}/* PCD_CALC_BLK32 */
#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
(wNBlocks) = (wCount) >> 1U;\
if(((wCount) & 0x1U) != 0U)\
{ \
(wNBlocks)++;\
} \
*pdwReg = (uint16_t)((wNBlocks) << 10U);\
}/* PCD_CALC_BLK2 */
#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
uint16_t wNBlocks;\
if((wCount) > 62U) \
{ \
PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \
} \
else \
{ \
PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \
} \
}/* PCD_SET_EP_CNT_RX_REG */
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount))\
}
/**
* @brief sets counter for the tx/rx buffer.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param wCount: Counter value.
* @retval None
*/
#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
uint16_t *pdwReg =PCD_EP_RX_CNT((USBx),(bEpNum)); \
PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\
}
/**
* @brief gets counter of the tx buffer.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval Counter value
*/
#define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
#define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
/**
* @brief Sets buffer 0/1 address in a double buffer endpoint.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param wBuf0Addr: buffer 0 address.
* @retval Counter value
*/
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) (PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)))
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) (PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)))
/**
* @brief Sets addresses in a double buffer endpoint.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param wBuf0Addr: buffer 0 address.
* @param wBuf1Addr = buffer 1 address.
* @retval None
*/
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
} /* PCD_SET_EP_DBUF_ADDR */
/**
* @brief Gets buffer 0/1 address of a double buffer endpoint.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
/**
* @brief Gets buffer 0/1 address of a double buffer endpoint.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @param bDir: endpoint dir EP_DBUF_OUT = OUT
* EP_DBUF_IN = IN
* @param wCount: Counter value
* @retval None
*/
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
if((bDir) == PCD_EP_DBUF_OUT)\
/* OUT endpoint */ \
{PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount))} \
else if((bDir) == PCD_EP_DBUF_IN)\
{ \
*PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
} \
} /* SetEPDblBuf0Count*/
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
if((bDir) == PCD_EP_DBUF_OUT)\
{/* OUT endpoint */ \
PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)) \
} \
else if((bDir) == PCD_EP_DBUF_IN)\
{/* IN endpoint */ \
*PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
} \
} /* SetEPDblBuf1Count */
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)) \
PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)) \
} /* PCD_SET_EP_DBUF_CNT */
/**
* @brief Gets buffer 0/1 rx/tx counter for double buffering.
* @param USBx: USB peripheral instance register address.
* @param bEpNum: Endpoint Number.
* @retval None
*/
#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
/** @defgroup PCD_Instance_definition PCD Instance definition
* @{
*/
#define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* STM32F042x6 || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F0xx_HAL_PCD_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

98
exixe_clock/firmware/clock12/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
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@@ -1,98 +0,0 @@
/**
******************************************************************************
* @file stm32f0xx_hal_pcd_ex.h
* @author MCD Application Team
* @brief Header file of PCD HAL Extension module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0xx_HAL_PCD_EX_H
#define __STM32F0xx_HAL_PCD_EX_H
#ifdef __cplusplus
extern "C" {
#endif
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx)|| defined(STM32F070xB)|| defined(STM32F070x6)
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal_def.h"
/** @addtogroup STM32F0xx_HAL_Driver
* @{
*/
/** @addtogroup PCDEx
* @{
*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macros -----------------------------------------------------------*/
/* Internal macros -----------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions
* @{
*/
/** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
* @{
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
uint16_t ep_addr,
uint16_t ep_kind,
uint32_t pmaadress);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* STM32F042x6 || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F0xx_HAL_PCD_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

797
exixe_clock/firmware/clock12/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
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@@ -1,797 +0,0 @@
/**
******************************************************************************
* @file stm32f0xx_hal_rtc.h
* @author MCD Application Team
* @brief Header file of RTC HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0xx_HAL_RTC_H
#define __STM32F0xx_HAL_RTC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal_def.h"
/** @addtogroup STM32F0xx_HAL_Driver
* @{
*/
/** @defgroup RTC RTC
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup RTC_Exported_Types RTC Exported Types
* @{
*/
/**
* @brief HAL State structures definition
*/
typedef enum
{
HAL_RTC_STATE_RESET = 0x00U, /*!< RTC not yet initialized or disabled */
HAL_RTC_STATE_READY = 0x01U, /*!< RTC initialized and ready for use */
HAL_RTC_STATE_BUSY = 0x02U, /*!< RTC process is ongoing */
HAL_RTC_STATE_TIMEOUT = 0x03U, /*!< RTC timeout state */
HAL_RTC_STATE_ERROR = 0x04U /*!< RTC error state */
}HAL_RTCStateTypeDef;
/**
* @brief RTC Configuration Structure definition
*/
typedef struct
{
uint32_t HourFormat; /*!< Specifies the RTC Hour Format.
This parameter can be a value of @ref RTC_Hour_Formats */
uint32_t AsynchPrediv; /*!< Specifies the RTC Asynchronous Predivider value.
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F */
uint32_t SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value.
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7FFF */
uint32_t OutPut; /*!< Specifies which signal will be routed to the RTC output.
This parameter can be a value of @ref RTCEx_Output_selection_Definitions */
uint32_t OutPutPolarity; /*!< Specifies the polarity of the output signal.
This parameter can be a value of @ref RTC_Output_Polarity_Definitions */
uint32_t OutPutType; /*!< Specifies the RTC Output Pin mode.
This parameter can be a value of @ref RTC_Output_Type_ALARM_OUT */
}RTC_InitTypeDef;
/**
* @brief RTC Time structure definition
*/
typedef struct
{
uint8_t Hours; /*!< Specifies the RTC Time Hour.
This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected.
This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */
uint8_t Minutes; /*!< Specifies the RTC Time Minutes.
This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
uint8_t Seconds; /*!< Specifies the RTC Time Seconds.
This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
uint8_t TimeFormat; /*!< Specifies the RTC AM/PM Time.
This parameter can be a value of @ref RTC_AM_PM_Definitions */
uint32_t SubSeconds; /*!< Specifies the RTC_SSR RTC Sub Second register content.
This parameter corresponds to a time unit range between [0-1] Second
with [1 Sec / SecondFraction +1] granularity */
uint32_t SecondFraction; /*!< Specifies the range or granularity of Sub Second register content
corresponding to Synchronous pre-scaler factor value (PREDIV_S)
This parameter corresponds to a time unit range between [0-1] Second
with [1 Sec / SecondFraction +1] granularity.
This field will be used only by HAL_RTC_GetTime function */
uint32_t DayLightSaving; /*!< Specifies RTC_DayLightSaveOperation: the value of hour adjustment.
This parameter can be a value of @ref RTC_DayLightSaving_Definitions */
uint32_t StoreOperation; /*!< Specifies RTC_StoreOperation value to be written in the BCK bit
in CR register to store the operation.
This parameter can be a value of @ref RTC_StoreOperation_Definitions */
}RTC_TimeTypeDef;
/**
* @brief RTC Date structure definition
*/
typedef struct
{
uint8_t WeekDay; /*!< Specifies the RTC Date WeekDay.
This parameter can be a value of @ref RTC_WeekDay_Definitions */
uint8_t Month; /*!< Specifies the RTC Date Month (in BCD format).
This parameter can be a value of @ref RTC_Month_Date_Definitions */
uint8_t Date; /*!< Specifies the RTC Date.
This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
uint8_t Year; /*!< Specifies the RTC Date Year.
This parameter must be a number between Min_Data = 0 and Max_Data = 99 */
}RTC_DateTypeDef;
/**
* @brief RTC Alarm structure definition
*/
typedef struct
{
RTC_TimeTypeDef AlarmTime; /*!< Specifies the RTC Alarm Time members */
uint32_t AlarmMask; /*!< Specifies the RTC Alarm Masks.
This parameter can be a value of @ref RTC_AlarmMask_Definitions */
uint32_t AlarmSubSecondMask; /*!< Specifies the RTC Alarm SubSeconds Masks.
This parameter can be a value of @ref RTC_Alarm_Sub_Seconds_Masks_Definitions */
uint32_t AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay.
This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
uint8_t AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay.
If the Alarm Date is selected, this parameter must be set to a value in the 1-31 range.
If the Alarm WeekDay is selected, this parameter can be a value of @ref RTC_WeekDay_Definitions */
uint32_t Alarm; /*!< Specifies the alarm .
This parameter can be a value of @ref RTC_Alarms_Definitions */
}RTC_AlarmTypeDef;
/**
* @brief RTC Handle Structure definition
*/
typedef struct
{
RTC_TypeDef *Instance; /*!< Register base address */
RTC_InitTypeDef Init; /*!< RTC required parameters */
HAL_LockTypeDef Lock; /*!< RTC locking object */
__IO HAL_RTCStateTypeDef State; /*!< Time communication state */
}RTC_HandleTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup RTC_Exported_Constants RTC Exported Constants
* @{
*/
/** @defgroup RTC_Hour_Formats RTC Hour Formats
* @{
*/
#define RTC_HOURFORMAT_24 0x00000000U
#define RTC_HOURFORMAT_12 0x00000040U
/**
* @}
*/
/** @defgroup RTC_Output_Polarity_Definitions RTC Output Polarity Definitions
* @{
*/
#define RTC_OUTPUT_POLARITY_HIGH 0x00000000U
#define RTC_OUTPUT_POLARITY_LOW 0x00100000U
/**
* @}
*/
/** @defgroup RTC_Output_Type_ALARM_OUT RTC Output Type ALARM OUT
* @{
*/
#define RTC_OUTPUT_TYPE_OPENDRAIN 0x00000000U
#define RTC_OUTPUT_TYPE_PUSHPULL 0x00040000U
/**
* @}
*/
/** @defgroup RTC_AM_PM_Definitions RTC AM PM Definitions
* @{
*/
#define RTC_HOURFORMAT12_AM ((uint8_t)0x00)
#define RTC_HOURFORMAT12_PM ((uint8_t)0x40)
/**
* @}
*/
/** @defgroup RTC_DayLightSaving_Definitions RTC DayLight Saving Definitions
* @{
*/
#define RTC_DAYLIGHTSAVING_SUB1H 0x00020000U
#define RTC_DAYLIGHTSAVING_ADD1H 0x00010000U
#define RTC_DAYLIGHTSAVING_NONE 0x00000000U
/**
* @}
*/
/** @defgroup RTC_StoreOperation_Definitions RTC Store Operation Definitions
* @{
*/
#define RTC_STOREOPERATION_RESET 0x00000000U
#define RTC_STOREOPERATION_SET 0x00040000U
/**
* @}
*/
/** @defgroup RTC_Input_parameter_format_definitions RTC Input parameter format definitions
* @{
*/
#define RTC_FORMAT_BIN 0x000000000U
#define RTC_FORMAT_BCD 0x000000001U
/**
* @}
*/
/** @defgroup RTC_Month_Date_Definitions RTC Month Date Definitions
* @{
*/
/* Coded in BCD format */
#define RTC_MONTH_JANUARY ((uint8_t)0x01)
#define RTC_MONTH_FEBRUARY ((uint8_t)0x02)
#define RTC_MONTH_MARCH ((uint8_t)0x03)
#define RTC_MONTH_APRIL ((uint8_t)0x04)
#define RTC_MONTH_MAY ((uint8_t)0x05)
#define RTC_MONTH_JUNE ((uint8_t)0x06)
#define RTC_MONTH_JULY ((uint8_t)0x07)
#define RTC_MONTH_AUGUST ((uint8_t)0x08)
#define RTC_MONTH_SEPTEMBER ((uint8_t)0x09)
#define RTC_MONTH_OCTOBER ((uint8_t)0x10)
#define RTC_MONTH_NOVEMBER ((uint8_t)0x11)
#define RTC_MONTH_DECEMBER ((uint8_t)0x12)
/**
* @}
*/
/** @defgroup RTC_WeekDay_Definitions RTC WeekDay Definitions
* @{
*/
#define RTC_WEEKDAY_MONDAY ((uint8_t)0x01)
#define RTC_WEEKDAY_TUESDAY ((uint8_t)0x02)
#define RTC_WEEKDAY_WEDNESDAY ((uint8_t)0x03)
#define RTC_WEEKDAY_THURSDAY ((uint8_t)0x04)
#define RTC_WEEKDAY_FRIDAY ((uint8_t)0x05)
#define RTC_WEEKDAY_SATURDAY ((uint8_t)0x06)
#define RTC_WEEKDAY_SUNDAY ((uint8_t)0x07)
/**
* @}
*/
/** @defgroup RTC_AlarmDateWeekDay_Definitions RTC Alarm Date WeekDay Definitions
* @{
*/
#define RTC_ALARMDATEWEEKDAYSEL_DATE 0x00000000U
#define RTC_ALARMDATEWEEKDAYSEL_WEEKDAY 0x40000000U
/**
* @}
*/
/** @defgroup RTC_AlarmMask_Definitions RTC Alarm Mask Definitions
* @{
*/
#define RTC_ALARMMASK_NONE 0x00000000U
#define RTC_ALARMMASK_DATEWEEKDAY RTC_ALRMAR_MSK4
#define RTC_ALARMMASK_HOURS RTC_ALRMAR_MSK3
#define RTC_ALARMMASK_MINUTES RTC_ALRMAR_MSK2
#define RTC_ALARMMASK_SECONDS RTC_ALRMAR_MSK1
#define RTC_ALARMMASK_ALL 0x80808080U
/**
* @}
*/
/** @defgroup RTC_Alarms_Definitions RTC Alarms Definitions
* @{
*/
#define RTC_ALARM_A RTC_CR_ALRAE
/**
* @}
*/
/** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions RTC Alarm Sub Seconds Masks Definitions
* @{
*/
#define RTC_ALARMSUBSECONDMASK_ALL 0x00000000U /*!< All Alarm SS fields are masked.
There is no comparison on sub seconds
for Alarm */
#define RTC_ALARMSUBSECONDMASK_SS14_1 0x01000000U /*!< SS[14:1] are don't care in Alarm
comparison. Only SS[0] is compared. */
#define RTC_ALARMSUBSECONDMASK_SS14_2 0x02000000U /*!< SS[14:2] are don't care in Alarm
comparison. Only SS[1:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_3 0x03000000U /*!< SS[14:3] are don't care in Alarm
comparison. Only SS[2:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_4 0x04000000U /*!< SS[14:4] are don't care in Alarm
comparison. Only SS[3:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_5 0x05000000U /*!< SS[14:5] are don't care in Alarm
comparison. Only SS[4:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_6 0x06000000U /*!< SS[14:6] are don't care in Alarm
comparison. Only SS[5:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_7 0x07000000U /*!< SS[14:7] are don't care in Alarm
comparison. Only SS[6:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_8 0x08000000U /*!< SS[14:8] are don't care in Alarm
comparison. Only SS[7:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_9 0x09000000U /*!< SS[14:9] are don't care in Alarm
comparison. Only SS[8:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_10 0x0A000000U /*!< SS[14:10] are don't care in Alarm
comparison. Only SS[9:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_11 0x0B000000U /*!< SS[14:11] are don't care in Alarm
comparison. Only SS[10:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_12 0x0C000000U /*!< SS[14:12] are don't care in Alarm
comparison.Only SS[11:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14_13 0x0D000000U /*!< SS[14:13] are don't care in Alarm
comparison. Only SS[12:0] are compared */
#define RTC_ALARMSUBSECONDMASK_SS14 0x0E000000U /*!< SS[14] is don't care in Alarm
comparison.Only SS[13:0] are compared */
#define RTC_ALARMSUBSECONDMASK_NONE 0x0F000000U /*!< SS[14:0] are compared and must match
to activate alarm. */
/**
* @}
*/
/** @defgroup RTC_Interrupts_Definitions RTC Interrupts Definitions
* @{
*/
#define RTC_IT_TS 0x00008000U
#define RTC_IT_WUT 0x00004000U
#define RTC_IT_ALRA 0x00001000U
#define RTC_IT_TAMP 0x00000004U /* Used only to Enable the Tamper Interrupt */
#define RTC_IT_TAMP1 0x00020000U /*only for RTC_ISR flag check*/
#define RTC_IT_TAMP2 0x00040000U /*only for RTC_ISR flag check*/
#define RTC_IT_TAMP3 0x00080000U /*only for RTC_ISR flag check*/
/**
* @}
*/
/** @defgroup RTC_Flags_Definitions RTC Flags Definitions
* @{
*/
#define RTC_FLAG_RECALPF 0x00010000U
#define RTC_FLAG_TAMP3F 0x00008000U
#define RTC_FLAG_TAMP2F 0x00004000U
#define RTC_FLAG_TAMP1F 0x00002000U
#define RTC_FLAG_TSOVF 0x00001000U
#define RTC_FLAG_TSF 0x00000800U
#define RTC_FLAG_WUTF 0x00000400U
#define RTC_FLAG_ALRAF 0x00000100U
#define RTC_FLAG_INITF 0x00000040U
#define RTC_FLAG_RSF 0x00000020U
#define RTC_FLAG_INITS 0x00000010U
#define RTC_FLAG_SHPF 0x00000008U
#define RTC_FLAG_WUTWF 0x00000004U
#define RTC_FLAG_ALRAWF 0x00000001U
/**
* @}
*/
/**
* @}
*/
/* Exported macros ------------------------------------------------------------*/
/** @defgroup RTC_Exported_Macros RTC Exported Macros
* @{
*/
/** @brief Reset RTC handle state
* @param __HANDLE__: RTC handle.
* @retval None
*/
#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RTC_STATE_RESET)
/**
* @brief Disable the write protection for RTC registers.
* @param __HANDLE__: specifies the RTC handle.
* @retval None
*/
#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__) \
do{ \
(__HANDLE__)->Instance->WPR = 0xCAU; \
(__HANDLE__)->Instance->WPR = 0x53U; \
} while(0)
/**
* @brief Enable the write protection for RTC registers.
* @param __HANDLE__: specifies the RTC handle.
* @retval None
*/
#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__) \
do{ \
(__HANDLE__)->Instance->WPR = 0xFFU; \
} while(0)
/**
* @brief Enable the RTC ALARMA peripheral.
* @param __HANDLE__: specifies the RTC handle.
* @retval None
*/
#define __HAL_RTC_ALARMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRAE))
/**
* @brief Disable the RTC ALARMA peripheral.
* @param __HANDLE__: specifies the RTC handle.
* @retval None
*/
#define __HAL_RTC_ALARMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRAE))
/**
* @brief Enable the RTC Alarm interrupt.
* @param __HANDLE__: specifies the RTC handle.
* @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg RTC_IT_ALRA: Alarm A interrupt
* @retval None
*/
#define __HAL_RTC_ALARM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
/**
* @brief Disable the RTC Alarm interrupt.
* @param __HANDLE__: specifies the RTC handle.
* @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg RTC_IT_ALRA: Alarm A interrupt
* @retval None
*/
#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
/**
* @brief Check whether the specified RTC Alarm interrupt has occurred or not.
* @param __HANDLE__: specifies the RTC handle.
* @param __INTERRUPT__: specifies the RTC Alarm interrupt to check.
* This parameter can be:
* @arg RTC_IT_ALRA: Alarm A interrupt
* @retval None
*/
#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4U)) != RESET)? SET : RESET)
/**
* @brief Check whether the specified RTC Alarm interrupt has been enabled or not.
* @param __HANDLE__: specifies the RTC handle.
* @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to check.
* This parameter can be:
* @arg RTC_IT_ALRA: Alarm A interrupt
* @retval None
*/
#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
/**
* @brief Get the selected RTC Alarm's flag status.
* @param __HANDLE__: specifies the RTC handle.
* @param __FLAG__: specifies the RTC Alarm Flag sources to check.
* This parameter can be:
* @arg RTC_FLAG_ALRAF
* @arg RTC_FLAG_ALRAWF
* @retval None
*/
#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
/**
* @brief Clear the RTC Alarm's pending flags.
* @param __HANDLE__: specifies the RTC handle.
* @param __FLAG__: specifies the RTC Alarm Flag sources to clear.
* This parameter can be:
* @arg RTC_FLAG_ALRAF
* @retval None
*/
#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT) | ((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
/**
* @brief Enable interrupt on the RTC Alarm associated Exti line.
* @retval None
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_IT() (EXTI->IMR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
* @brief Disable interrupt on the RTC Alarm associated Exti line.
* @retval None
*/
#define __HAL_RTC_ALARM_EXTI_DISABLE_IT() (EXTI->IMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
/**
* @brief Enable event on the RTC Alarm associated Exti line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_EVENT() (EXTI->EMR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
* @brief Disable event on the RTC Alarm associated Exti line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
/**
* @brief Enable falling edge trigger on the RTC Alarm associated Exti line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
* @brief Disable falling edge trigger on the RTC Alarm associated Exti line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
/**
* @brief Enable rising edge trigger on the RTC Alarm associated Exti line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= RTC_EXTI_LINE_ALARM_EVENT)
/**
* @brief Disable rising edge trigger on the RTC Alarm associated Exti line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(RTC_EXTI_LINE_ALARM_EVENT))
/**
* @brief Enable rising & falling edge trigger on the RTC Alarm associated Exti line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();__HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE();
/**
* @brief Disable rising & falling edge trigger on the RTC Alarm associated Exti line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE();__HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE();
/**
* @brief Check whether the RTC Alarm associated Exti line interrupt flag is set or not.
* @retval Line Status.
*/
#define __HAL_RTC_ALARM_EXTI_GET_FLAG() (EXTI->PR & RTC_EXTI_LINE_ALARM_EVENT)
/**
* @brief Clear the RTC Alarm associated Exti line flag.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_ALARM_EVENT)
/**
* @brief Generate a Software interrupt on RTC Alarm associated Exti line.
* @retval None.
*/
#define __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() (EXTI->SWIER |= RTC_EXTI_LINE_ALARM_EVENT)
/**
* @}
*/
/* Include RTC HAL Extended module */
#include "stm32f0xx_hal_rtc_ex.h"
/* Exported functions --------------------------------------------------------*/
/** @defgroup RTC_Exported_Functions RTC Exported Functions
* @{
*/
/** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions
* @{
*/
/* Initialization and de-initialization functions ****************************/
HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc);
void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc);
void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
/**
* @}
*/
/** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions
* @{
*/
/* RTC Time and Date functions ************************************************/
HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
/**
* @}
*/
/** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions
* @{
*/
/* RTC Alarm functions ********************************************************/
HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm);
HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format);
void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc);
HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout);
void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc);
/**
* @}
*/
/** @defgroup RTC_Exported_Functions_Group4 Peripheral Control functions
* @{
*/
/* Peripheral Control functions ***********************************************/
HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc);
/**
* @}
*/
/** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions
* @{
*/
/* Peripheral State functions *************************************************/
HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
/**
* @}
*/
/**
* @}
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup RTC_Private_Constants RTC Private Constants
* @{
*/
/* Masks Definition */
#define RTC_TR_RESERVED_MASK 0x007F7F7FU
#define RTC_DR_RESERVED_MASK 0x00FFFF3FU
#define RTC_INIT_MASK 0xFFFFFFFFU
#define RTC_RSF_MASK 0xFFFFFF5FU
#define RTC_FLAGS_MASK ((uint32_t) (RTC_FLAG_RECALPF | RTC_FLAG_TAMP3F | RTC_FLAG_TAMP2F | \
RTC_FLAG_TAMP1F| RTC_FLAG_TSOVF | RTC_FLAG_TSF | \
RTC_FLAG_WUTF | RTC_FLAG_ALRAF | \
RTC_FLAG_INITF | RTC_FLAG_RSF | RTC_FLAG_INITS | \
RTC_FLAG_SHPF | RTC_FLAG_WUTWF | RTC_FLAG_ALRAWF))
#define RTC_TIMEOUT_VALUE 1000U
#define RTC_EXTI_LINE_ALARM_EVENT ((uint32_t)EXTI_IMR_MR17) /*!< External interrupt line 17 Connected to the RTC Alarm event */
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup RTC_Private_Macros RTC Private Macros
* @{
*/
/** @defgroup RTC_IS_RTC_Definitions RTC Private macros to check input parameters
* @{
*/
#define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HOURFORMAT_12) || \
((FORMAT) == RTC_HOURFORMAT_24))
#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPUT_POLARITY_HIGH) || \
((POL) == RTC_OUTPUT_POLARITY_LOW))
#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OUTPUT_TYPE_OPENDRAIN) || \
((TYPE) == RTC_OUTPUT_TYPE_PUSHPULL))
#define IS_RTC_HOUR12(HOUR) (((HOUR) > 0U) && ((HOUR) <= 12U))
#define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23U)
#define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FU)
#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FFFU)
#define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59U)
#define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59U)
#define IS_RTC_HOURFORMAT12(PM) (((PM) == RTC_HOURFORMAT12_AM) || \
((PM) == RTC_HOURFORMAT12_PM))
#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DAYLIGHTSAVING_SUB1H) || \
((SAVE) == RTC_DAYLIGHTSAVING_ADD1H) || \
((SAVE) == RTC_DAYLIGHTSAVING_NONE))
#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_STOREOPERATION_RESET) || \
((OPERATION) == RTC_STOREOPERATION_SET))
#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_FORMAT_BIN) || ((FORMAT) == RTC_FORMAT_BCD))
#define IS_RTC_YEAR(YEAR) ((YEAR) <= 99U)
#define IS_RTC_MONTH(MONTH) (((MONTH) >= 1U) && ((MONTH) <= 12U))
#define IS_RTC_DATE(DATE) (((DATE) >= 1U) && ((DATE) <= 31U))
#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \
((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \
((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \
((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \
((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \
((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) > 0U) && ((DATE) <= 31U))
#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \
((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \
((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \
((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \
((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \
((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \
((WEEKDAY) == RTC_WEEKDAY_SUNDAY))
#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_ALARMDATEWEEKDAYSEL_DATE) || \
((SEL) == RTC_ALARMDATEWEEKDAYSEL_WEEKDAY))
#define IS_RTC_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7FU) == (uint32_t)RESET)
#define IS_RTC_ALARM(ALARM) ((ALARM) == RTC_ALARM_A)
#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= 0x00007FFFU)
#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_1) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_2) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_3) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_4) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_5) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_6) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_7) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_8) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_9) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_10) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_11) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_12) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14_13) || \
((MASK) == RTC_ALARMSUBSECONDMASK_SS14) || \
((MASK) == RTC_ALARMSUBSECONDMASK_NONE))
/**
* @}
*/
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup RTC_Private_Functions RTC Private Functions
* @{
*/
HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc);
uint8_t RTC_ByteToBcd2(uint8_t Value);
uint8_t RTC_Bcd2ToByte(uint8_t Value);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F0xx_HAL_RTC_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@@ -1,204 +0,0 @@
/**
******************************************************************************
* @file stm32f0xx_hal_adc_ex.c
* @author MCD Application Team
* @brief This file provides firmware functions to manage the following
* functionalities of the Analog to Digital Convertor (ADC)
* peripheral:
* + Operation functions
* ++ Calibration (ADC automatic self-calibration)
* Other functions (generic functions) are available in file
* "stm32f0xx_hal_adc.c".
*
@verbatim
[..]
(@) Sections "ADC peripheral features" and "How to use this driver" are
available in file of generic functions "stm32l1xx_hal_adc.c".
[..]
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal.h"
/** @addtogroup STM32F0xx_HAL_Driver
* @{
*/
/** @defgroup ADCEx ADCEx
* @brief ADC HAL module driver
* @{
*/
#ifdef HAL_ADC_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @defgroup ADCEx_Private_Constants ADCEx Private Constants
* @{
*/
/* Fixed timeout values for ADC calibration, enable settling time, disable */
/* settling time. */
/* Values defined to be higher than worst cases: low clock frequency, */
/* maximum prescaler. */
/* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */
/* prescaler 4. */
/* Unit: ms */
#define ADC_DISABLE_TIMEOUT 2
#define ADC_CALIBRATION_TIMEOUT 2U
/**
* @}
*/
/* Private macros -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
* @{
*/
/** @defgroup ADCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions
* @brief Extended Initialization and Configuration functions
*
@verbatim
===============================================================================
##### IO operation functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Perform the ADC calibration.
@endverbatim
* @{
*/
/**
* @brief Perform an ADC automatic self-calibration
* Calibration prerequisite: ADC must be disabled (execute this
* function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
* @note Calibration factor can be read after calibration, using function
* HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]).
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
{
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
uint32_t tickstart = 0U;
uint32_t backup_setting_adc_dma_transfer = 0; /* Note: Variable not declared as volatile because register read is already declared as volatile */
/* Check the parameters */
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
/* Process locked */
__HAL_LOCK(hadc);
/* Calibration prerequisite: ADC must be disabled. */
if (ADC_IS_ENABLE(hadc) == RESET)
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
HAL_ADC_STATE_REG_BUSY,
HAL_ADC_STATE_BUSY_INTERNAL);
/* Disable ADC DMA transfer request during calibration */
/* Note: Specificity of this STM32 serie: Calibration factor is */
/* available in data register and also transfered by DMA. */
/* To not insert ADC calibration factor among ADC conversion data */
/* in array variable, DMA transfer must be disabled during */
/* calibration. */
backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG);
CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG);
/* Start ADC calibration */
hadc->Instance->CR |= ADC_CR_ADCAL;
tickstart = HAL_GetTick();
/* Wait for calibration completion */
while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
{
if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Process unlocked */
__HAL_UNLOCK(hadc);
return HAL_ERROR;
}
}
/* Restore ADC DMA transfer request after calibration */
SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer);
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
tmp_hal_status = HAL_ERROR;
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
/* Return function status */
return tmp_hal_status;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_ADC_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

1412
exixe_clock/firmware/clock12/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c
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154
exixe_clock/firmware/clock12/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c
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/**
******************************************************************************
* @file stm32f0xx_hal_pcd_ex.c
* @author MCD Application Team
* @brief Extended PCD HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the USB Peripheral Controller:
* + Configuration of the PMA for EP
*
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal.h"
#ifdef HAL_PCD_MODULE_ENABLED
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)|| defined(STM32F070x6)
/** @addtogroup STM32F0xx_HAL_Driver
* @{
*/
/** @defgroup PCDEx PCDEx
* @brief PCD Extended HAL module driver
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions ---------------------------------------------------------*/
/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions
* @{
*/
/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
* @brief PCDEx control functions
*
@verbatim
===============================================================================
##### Extended Peripheral Control functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Update PMA configuration
@endverbatim
* @{
*/
/**
* @brief Configure PMA for EP
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param ep_kind: endpoint Kind
* @arg USB_SNG_BUF: Single Buffer used
* @arg USB_DBL_BUF: Double Buffer used
* @param pmaadress: EP address in The PMA: In case of single buffer endpoint
* this parameter is 16-bit value providing the address
* in PMA allocated to endpoint.
* In case of double buffer endpoint this parameter
* is a 32-bit value providing the endpoint buffer 0 address
* in the LSB part of 32-bit value and endpoint buffer 1 address
* in the MSB part of 32-bit value.
* @retval : status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
uint16_t ep_addr,
uint16_t ep_kind,
uint32_t pmaadress)
{
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
{
ep = &hpcd->IN_ep[ep_addr & 0x7FU];
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
{
/*Single Buffer*/
ep->doublebuffer = 0U;
/*Configure the PMA*/
ep->pmaadress = (uint16_t)pmaadress;
}
else /*USB_DBL_BUF*/
{
/*Double Buffer Endpoint*/
ep->doublebuffer = 1U;
/*Configure the PMA*/
ep->pmaaddr0 = pmaadress & 0xFFFFU;
ep->pmaaddr1 = (pmaadress & 0xFFFF0000U) >> 16U;
}
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* STM32F042x6 || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
#endif /* HAL_PCD_MODULE_ENABLED */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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exixe_clock/firmware/clock12/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc.c
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1594
exixe_clock/firmware/clock12/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc_ex.c
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171
exixe_clock/firmware/clock12/Inc/FreeRTOSConfig.h
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@@ -1,171 +0,0 @@
/*
FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* Section where include file can be added */
/* USER CODE END Includes */
/* Ensure stdint is only used by the compiler, and not the assembler. */
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
#include <stdint.h>
#include "main.h"
extern uint32_t SystemCoreClock;
#endif
#define configUSE_PREEMPTION 1
#define configSUPPORT_STATIC_ALLOCATION 0
#define configSUPPORT_DYNAMIC_ALLOCATION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 7 )
#define configMINIMAL_STACK_SIZE ((uint16_t)64)
#define configTOTAL_HEAP_SIZE ((size_t)4096)
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_16_BIT_TICKS 0
#define configQUEUE_REGISTRY_SIZE 8
#define configENABLE_BACKWARD_COMPATIBILITY 0
#define configUSE_TASK_NOTIFICATIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 0
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 2
#endif
/* The lowest interrupt priority that can be used in a call to a "set priority"
function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 3
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 3
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
/* USER CODE BEGIN 1 */
#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
/* USER CODE END 1 */
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
/* IMPORTANT: This define MUST be commented when used with STM32Cube firmware,
to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
/* #define xPortSysTickHandler SysTick_Handler */
/* USER CODE BEGIN Defines */
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
/* USER CODE END Defines */
#endif /* FREERTOS_CONFIG_H */

70
exixe_clock/firmware/clock12/Inc/animations.h
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@@ -1,70 +0,0 @@
#ifndef __ANIMATIONS_H
#define __ANIMATIONS_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
#include "cmsis_os.h"
#include "main.h"
#include "shared.h"
#include "helpers.h"
#define PWM_STATUS_SIZE (SPI_CMD_SIZE + 1)
#define LED_CHANNEL_SIZE 3
#define ANIMATION_NO_ANIMATION 0
#define ANIMATION_CROSS_FADE 1
#define ANIMATION_FULLY_ON 2
#define ANIMATION_BREATHING 3
#define DIGIT_1 1
#define DIGIT_2 2
#define DIGIT_3 3
#define DIGIT_4 4
#define DIGIT_5 5
#define DIGIT_6 6
#define DIGIT_7 7
#define DIGIT_8 8
#define DIGIT_9 9
#define DIGIT_0 10
#define DIGIT_RIGHT_DOT 11
#define DIGIT_LEFT_DOT 12
#define DIGIT_NONE 16
typedef struct
{
uint8_t start_digit;
uint8_t end_digit;
uint32_t animation_start;
uint8_t animation_type;
uint8_t pwm_status[PWM_STATUS_SIZE];
uint8_t left_dot_status;
uint8_t right_dot_status;
} digit_animation;
typedef struct
{
uint32_t animation_start;
uint8_t animation_type;
uint8_t target_color[LED_CHANNEL_SIZE];
double pwm_status[LED_CHANNEL_SIZE];
double step[LED_CHANNEL_SIZE];
} led_animation;
void led_animation_init(led_animation* anime_struct);
void led_start_animation(led_animation* anime_struct, uint8_t dest_color[LED_CHANNEL_SIZE], uint8_t anime_type);
void led_animation_handler(led_animation* anime_struct);
void animation_init(digit_animation* anime_struct);
void start_animation(digit_animation* anime_struct, uint8_t dest_digit, uint8_t anime_type);
void tube_print2(int8_t value, digit_animation* msa, digit_animation* lsa, uint8_t type);
void animation_handler(digit_animation* anime_struct);
#ifdef __cplusplus
}
#endif
#endif

38
exixe_clock/firmware/clock12/Inc/buttons.h
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@@ -1,38 +0,0 @@
#ifndef __BUTTONS_H
#define __BUTTONS_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
#include "helpers.h"
#include "shared.h"
#define LONG_PRESS_THRESHOLD_MS 1000
#define BUTTON_STATE_PRESSED GPIO_PIN_RESET
#define BUTTON_STATE_RELEASED GPIO_PIN_SET
#define BUTTON_NO_PRESS 0
#define BUTTON_SHORT_PRESS 1
#define BUTTON_LONG_PRESS 2
// maybe use another var as long press result, gets reset when comsumed, this way it can return early at long press
typedef struct
{
uint8_t state;
int32_t last_action;
} my_button;
void button_init(my_button* butt, GPIO_PinState ps);
uint8_t button_update(my_button* butt, GPIO_PinState ps);
#ifdef __cplusplus
}
#endif
#endif

49
exixe_clock/firmware/clock12/Inc/config.h
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@@ -1,49 +0,0 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
#include "helpers.h"
#include "shared.h"
/*
mode button is up button
when in regular mode, press mode button
to cycle through display modes:
0 24hr no temp
1 24hr with temp
2 12hr no temp
3 12hr with temp
hold mode button while booting:
enter UTC offset mode:
then use two buttons to set UTC offset
*/
#define DISPLAY_MODE_SIZE 2
#define DISPLAY_MODE_TIME_ONLY 0
#define DISPLAY_MODE_TIME_TEMP 1
#define EEPROM_ADDR_UTC_OFFSET 0
#define EEPROM_ADDR_DISPLAY_MODE 1
#define EEPROM_ADDR_USE_24HR 2
uint8_t get_display_mode(void);
int8_t get_utc_offset(void);
int8_t utc_offset_trim(int8_t value);
uint8_t get_use_24hour(void);
#ifdef __cplusplus
}
#endif
#endif

20
exixe_clock/firmware/clock12/Inc/delay_us.h
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@@ -1,20 +0,0 @@
#ifndef __DELAY_US_H
#define __DELAY_US_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
void delay_us_init(TIM_HandleTypeDef* htim_base);
void delay_us(uint32_t delay);
uint32_t micros(void);
#ifdef __cplusplus
}
#endif
#endif

19
exixe_clock/firmware/clock12/Inc/ds18b20.h
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@@ -1,19 +0,0 @@
#ifndef __DS18B20_H
#define __DS18B20_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
void ds18b20_start_conversion(void);
int16_t ds18b20_get_temp(void);
#ifdef __cplusplus
}
#endif
#endif

27
exixe_clock/firmware/clock12/Inc/eeprom.h
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@@ -1,27 +0,0 @@
#ifndef __EEPROM_H
#define __EEPROM_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
#include "helpers.h"
#include "shared.h"
#define EEPROM_SIZE 1024
#define EEPROM_READ_ADDR 0xA1
#define EEPROM_WRITE_ADDR 0xA0
void eeprom_init(I2C_HandleTypeDef *hi2c);
void eeprom_write(uint16_t address, uint8_t data);
uint8_t eeprom_read(int32_t address);
void eeprom_erase(void);
#ifdef __cplusplus
}
#endif
#endif

18
exixe_clock/firmware/clock12/Inc/gps_config.h
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@@ -1,18 +0,0 @@
#ifndef __GPS_CONFIG_H
#define __GPS_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
void gps_init(void);
#ifdef __cplusplus
}
#endif
#endif

47
exixe_clock/firmware/clock12/Inc/helpers.h
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@@ -1,47 +0,0 @@
#ifndef __HELPERS_H
#define __HELPERS_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
#include "minmea.h"
#define SPI_CMD_SIZE 16
#define SPI_SMD_DIGIT_END 11
#define SPI_CMD_DOT_END 13
#define TUBE_COUNT 6
#define GPS_BUF_SIZE 128
#define SPI_CMD_UPDATE 0xaa
#define SETUP_NO_SETUP 0
#define SETUP_UTC_OFFSET 1
#define SETUP_12H24H 2
#define RTC_CALIB_FREQ_MS 30000
typedef struct
{
int32_t last_recv;
int32_t curr_index;
int32_t buf_size;
uint8_t* buf;
} linear_buf;
int32_t linear_buf_init(linear_buf *lb, int32_t size);
void linear_buf_reset(linear_buf *lb);
int32_t linear_buf_idle(linear_buf *lb, int32_t timeout);
int32_t linear_buf_line_available(linear_buf *lb);
int32_t linear_buf_add(linear_buf *lb, uint8_t c);
int32_t linear_buf_add_str(linear_buf *lb, uint8_t *s, uint32_t len);
uint8_t rtc_gps_calib(struct minmea_sentence_rmc *gps_rmc);
int32_t get_time_rtc(void);
int32_t get_time_rmc(struct minmea_sentence_rmc *gps_rmc);
void unix_ts_2_datetime(int32_t ts, uint8_t* year, uint8_t* month, uint8_t* day, uint8_t* hour, uint8_t* minute, uint8_t* second);
#ifdef __cplusplus
}
#endif
#endif

106
exixe_clock/firmware/clock12/Inc/main.h
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@@ -1,106 +0,0 @@
/**
******************************************************************************
* File Name : main.h
* Description : This file contains the common defines of the application
******************************************************************************
* This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools
* are owned by their respective copyright owners.
*
* Copyright (c) 2017 STMicroelectronics International N.V.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted, provided that the following conditions are met:
*
* 1. Redistribution of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific written permission.
* 4. This software, including modifications and/or derivative works of this
* software, must execute solely and exclusively on microcontroller or
* microprocessor devices manufactured by or for STMicroelectronics.
* 5. Redistribution and use of this software other than as permitted under
* this license is void and will automatically terminate your rights under
* this license.
*
* THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
* RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
* SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private define ------------------------------------------------------------*/
#define GPS_RESET_Pin GPIO_PIN_13
#define GPS_RESET_GPIO_Port GPIOC
#define UP_BUTTON_Pin GPIO_PIN_0
#define UP_BUTTON_GPIO_Port GPIOF
#define DOWN_BUTTON_Pin GPIO_PIN_1
#define DOWN_BUTTON_GPIO_Port GPIOF
#define SD_CS_Pin GPIO_PIN_0
#define SD_CS_GPIO_Port GPIOA
#define OWIRE_DATA_Pin GPIO_PIN_6
#define OWIRE_DATA_GPIO_Port GPIOA
#define USER_LED_Pin GPIO_PIN_7
#define USER_LED_GPIO_Port GPIOA
#define EXIXE1_CS_Pin GPIO_PIN_0
#define EXIXE1_CS_GPIO_Port GPIOB
#define EXIXE2_CS_Pin GPIO_PIN_1
#define EXIXE2_CS_GPIO_Port GPIOB
#define EXIXE3_CS_Pin GPIO_PIN_2
#define EXIXE3_CS_GPIO_Port GPIOB
#define EXIXE4_CS_Pin GPIO_PIN_12
#define EXIXE4_CS_GPIO_Port GPIOB
#define EXIXE5_CS_Pin GPIO_PIN_13
#define EXIXE5_CS_GPIO_Port GPIOB
#define EXIXE6_CS_Pin GPIO_PIN_14
#define EXIXE6_CS_GPIO_Port GPIOB
#define GPS_TP_Pin GPIO_PIN_15
#define GPS_TP_GPIO_Port GPIOB
#define GPS_TP_EXTI_IRQn EXTI4_15_IRQn
#define EXIXE_RESET_Pin GPIO_PIN_15
#define EXIXE_RESET_GPIO_Port GPIOA
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void _Error_Handler(char *, int);
#define Error_Handler() _Error_Handler(__FILE__, __LINE__)
/**
* @}
*/
/**
* @}
*/
#endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

237
exixe_clock/firmware/clock12/Inc/minmea.h
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@@ -1,237 +0,0 @@
/*
* Copyright © 2014 Kosma Moczek <kosma@cloudyourcar.com>
* This program is free software. It comes without any warranty, to the extent
* permitted by applicable law. You can redistribute it and/or modify it under
* the terms of the Do What The Fuck You Want To Public License, Version 2, as
* published by Sam Hocevar. See the COPYING file for more details.
*/
#ifndef MINMEA_H
#define MINMEA_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <time.h>
#include <math.h>
#define MINMEA_MAX_LENGTH 80
enum minmea_sentence_id {
MINMEA_INVALID = -1,
MINMEA_UNKNOWN = 0,
MINMEA_SENTENCE_RMC,
MINMEA_SENTENCE_GGA,
MINMEA_SENTENCE_GSA,
MINMEA_SENTENCE_GLL,
MINMEA_SENTENCE_GST,
MINMEA_SENTENCE_GSV,
};
struct minmea_float {
int_least32_t value;
int_least32_t scale;
};
struct minmea_date {
int day;
int month;
int year;
};
struct minmea_time {
int hours;
int minutes;
int seconds;
int microseconds;
};
struct minmea_sentence_rmc {
struct minmea_time time;
bool valid;
struct minmea_float latitude;
struct minmea_float longitude;
struct minmea_float speed;
struct minmea_float course;
struct minmea_date date;
struct minmea_float variation;
};
struct minmea_sentence_gga {
struct minmea_time time;
struct minmea_float latitude;
struct minmea_float longitude;
int fix_quality;
int satellites_tracked;
struct minmea_float hdop;
struct minmea_float altitude; char altitude_units;
struct minmea_float height; char height_units;
int dgps_age;
};
enum minmea_gll_status {
MINMEA_GLL_STATUS_DATA_VALID = 'A',
MINMEA_GLL_STATUS_DATA_NOT_VALID = 'V',
};
enum minmea_gll_mode {
MINMEA_GLL_MODE_AUTONOMOUS = 'A',
MINMEA_GLL_MODE_DPGS = 'D',
MINMEA_GLL_MODE_DR = 'E',
};
struct minmea_sentence_gll {
struct minmea_float latitude;
struct minmea_float longitude;
struct minmea_time time;
char status;
char mode;
};
struct minmea_sentence_gst {
struct minmea_time time;
struct minmea_float rms_deviation;
struct minmea_float semi_major_deviation;
struct minmea_float semi_minor_deviation;
struct minmea_float semi_major_orientation;
struct minmea_float latitude_error_deviation;
struct minmea_float longitude_error_deviation;
struct minmea_float altitude_error_deviation;
};
enum minmea_gsa_mode {
MINMEA_GPGSA_MODE_AUTO = 'A',
MINMEA_GPGSA_MODE_FORCED = 'M',
};
enum minmea_gsa_fix_type {
MINMEA_GPGSA_FIX_NONE = 1,
MINMEA_GPGSA_FIX_2D = 2,
MINMEA_GPGSA_FIX_3D = 3,
};
struct minmea_sentence_gsa {
char mode;
int fix_type;
int sats[12];
struct minmea_float pdop;
struct minmea_float hdop;
struct minmea_float vdop;
};
struct minmea_sat_info {
int nr;
int elevation;
int azimuth;
int snr;
};
struct minmea_sentence_gsv {
int total_msgs;
int msg_nr;
int total_sats;
struct minmea_sat_info sats[4];
};
char parse_gps(char* line, struct minmea_sentence_rmc *ggps_rmc, struct minmea_sentence_gga *ggps_gga, struct minmea_sentence_gsa *ggps_gsa, struct minmea_sentence_gll *ggps_gll, struct minmea_sentence_gst *ggps_gst, struct minmea_sentence_gsv *ggps_gsv);
char * my_strsep(char **stringp, const char *delim);
/**
* Calculate raw sentence checksum. Does not check sentence integrity.
*/
uint8_t minmea_checksum(const char *sentence);
/**
* Check sentence validity and checksum. Returns true for valid sentences.
*/
bool minmea_check(const char *sentence, bool strict);
/**
* Determine talker identifier.
*/
bool minmea_talker_id(char talker[3], const char *sentence);
/**
* Determine sentence identifier.
*/
enum minmea_sentence_id minmea_sentence_id(const char *sentence, bool strict);
/**
* Scanf-like processor for NMEA sentences. Supports the following formats:
* c - single character (char *)
* d - direction, returned as 1/-1, default 0 (int *)
* f - fractional, returned as value + scale (int *, int *)
* i - decimal, default zero (int *)
* s - string (char *)
* t - talker identifier and type (char *)
* T - date/time stamp (int *, int *, int *)
* Returns true on success. See library source code for details.
*/
bool minmea_scan(const char *sentence, const char *format, ...);
/*
* Parse a specific type of sentence. Return true on success.
*/
bool minmea_parse_rmc(struct minmea_sentence_rmc *frame, const char *sentence);
bool minmea_parse_gga(struct minmea_sentence_gga *frame, const char *sentence);
bool minmea_parse_gsa(struct minmea_sentence_gsa *frame, const char *sentence);
bool minmea_parse_gll(struct minmea_sentence_gll *frame, const char *sentence);
bool minmea_parse_gst(struct minmea_sentence_gst *frame, const char *sentence);
bool minmea_parse_gsv(struct minmea_sentence_gsv *frame, const char *sentence);
/**
* Convert GPS UTC date/time representation to a UNIX timestamp.
*/
int minmea_gettime(int32_t *ts_second, int32_t *ts_microsecond, const struct minmea_date *date, const struct minmea_time *time_);
/**
* Rescale a fixed-point value to a different scale. Rounds towards zero.
*/
static inline int_least32_t minmea_rescale(struct minmea_float *f, int_least32_t new_scale)
{
if (f->scale == 0)
return 0;
if (f->scale == new_scale)
return f->value;
if (f->scale > new_scale)
return (f->value + ((f->value > 0) - (f->value < 0)) * f->scale/new_scale/2) / (f->scale/new_scale);
else
return f->value * (new_scale/f->scale);
}
/**
* Convert a fixed-point value to a floating-point value.
* Returns NaN for "unknown" values.
*/
static inline float minmea_tofloat(struct minmea_float *f)
{
if (f->scale == 0)
return NAN;
return (float) f->value / (float) f->scale;
}
/**
* Convert a raw coordinate to a floating point DD.DDD... value.
* Returns NaN for "unknown" values.
*/
static inline float minmea_tocoord(struct minmea_float *f)
{
if (f->scale == 0)
return NAN;
int_least32_t degrees = f->value / (f->scale * 100);
int_least32_t minutes = f->value % (f->scale * 100);
return (float) degrees + (float) minutes / (60 * f->scale);
}
#ifdef __cplusplus
}
#endif
#endif /* MINMEA_H */
/* vim: set ts=4 sw=4 et: */

21
exixe_clock/firmware/clock12/Inc/my_1wire.h
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@@ -1,21 +0,0 @@
#ifndef __MY_1WIRE_H
#define __MY_1WIRE_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
uint8_t my_1wire_reset(void);
void my_1wire_write_byte(uint8_t v);
uint8_t my_1wire_read_byte(void);
void my_1wire_read_bytes(uint8_t* arr, uint8_t size);
#ifdef __cplusplus
}
#endif
#endif

27
exixe_clock/firmware/clock12/Inc/my_tasks.h
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@@ -1,27 +0,0 @@
#ifndef __MY_TASKS_H
#define __MY_TASKS_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
#include "cmsis_os.h"
#include "main.h"
#include "shared.h"
#include "helpers.h"
void setup_task(void);
void animation_task_start(void const * argument);
void test_task_start(void const * argument);
void gps_temp_parse_task_start(void const * argument);
extern linear_buf gps_lb;
extern uint8_t gps_byte_buf[1];
extern uint32_t frame_counter;
#ifdef __cplusplus
}
#endif
#endif

25
exixe_clock/firmware/clock12/Inc/my_usb.h
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@@ -1,25 +0,0 @@
#ifndef __MY_USB_H
#define __MY_USB_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f0xx_hal.h"
#include "helpers.h"
#define USB_BUF_SIZE 128
extern char* usb_data;
extern linear_buf usb_recv_buf;
extern volatile int32_t port_opened;
void my_usb_init(void);
void my_usb_putchar(uint8_t ch);
char* my_usb_readline(void);
#ifdef __cplusplus
}
#endif
#endif

25
exixe_clock/firmware/clock12/Inc/shared.h
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@@ -1,25 +0,0 @@
#ifndef __shared_H
#define __shared_H
#include "stm32f0xx_hal.h"
#include "main.h"
extern SPI_HandleTypeDef hspi1;
#define spi1_ptr (&hspi1)
extern ADC_HandleTypeDef hadc;
#define adc_ptr (&hadc)
extern I2C_HandleTypeDef hi2c1;
#define i2c1_ptr (&hi2c1)
extern UART_HandleTypeDef huart1;
#define gps_uart_ptr (&huart1)
extern RTC_HandleTypeDef hrtc;
#define rtc_ptr (&hrtc)
extern IWDG_HandleTypeDef hiwdg;
#define iwdg_ptr (&hiwdg)
#endif

319
exixe_clock/firmware/clock12/Inc/stm32f0xx_hal_conf.h
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@@ -1,319 +0,0 @@
/**
******************************************************************************
* @file stm32f0xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0xx_HAL_CONF_H
#define __STM32F0xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_CAN_MODULE_ENABLED */
/*#define HAL_CEC_MODULE_ENABLED */
/*#define HAL_COMP_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_TSC_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/*#define HAL_LCD_MODULE_ENABLED */
/*#define HAL_LPTIM_MODULE_ENABLED */
/*#define HAL_RNG_MODULE_ENABLED */
#define HAL_RTC_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SMBUS_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_PCD_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_GPIO_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
/* ########################## HSE/HSI Values adaptation ##################### */
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
/**
* @brief In the following line adjust the External High Speed oscillator (HSE) Startup
* Timeout value
*/
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup
* Timeout value
*/
#if !defined (HSI_STARTUP_TIMEOUT)
#define HSI_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSI start up */
#endif /* HSI_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator for ADC (HSI14) value.
*/
#if !defined (HSI14_VALUE)
#define HSI14_VALUE ((uint32_t)14000000) /*!< Value of the Internal High Speed oscillator for ADC in Hz.
The real value may vary depending on the variations
in voltage and temperature. */
#endif /* HSI14_VALUE */
/**
* @brief Internal High Speed oscillator for USB (HSI48) value.
*/
#if !defined (HSI48_VALUE)
#define HSI48_VALUE ((uint32_t)48000000) /*!< Value of the Internal High Speed oscillator for USB in Hz.
The real value may vary depending on the variations
in voltage and temperature. */
#endif /* HSI48_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)40000)
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSI) value.
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */
/* Warning: Must be set to higher priority for HAL_Delay() */
/* and HAL_GetTick() usage under interrupt context */
#define USE_RTOS 0
#define PREFETCH_ENABLE 1
#define INSTRUCTION_CACHE_ENABLE 0
#define DATA_CACHE_ENABLE 0
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1 */
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f0xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f0xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f0xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f0xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f0xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f0xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f0xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32f0xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f0xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f0xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f0xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f0xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f0xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f0xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f0xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f0xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f0xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f0xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f0xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f0xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f0xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f0xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_TSC_MODULE_ENABLED
#include "stm32f0xx_hal_tsc.h"
#endif /* HAL_TSC_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f0xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f0xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f0xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F0xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

62
exixe_clock/firmware/clock12/Inc/stm32f0xx_it.h
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@@ -1,62 +0,0 @@
/**
******************************************************************************
* @file stm32f0xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
*
* COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0xx_IT_H
#define __STM32F0xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void SysTick_Handler(void);
void EXTI4_15_IRQHandler(void);
void TIM7_IRQHandler(void);
void USART1_IRQHandler(void);
void USB_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F0xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

79
exixe_clock/firmware/clock12/Inc/usb_device.h
View File

@@ -1,79 +0,0 @@
/**
******************************************************************************
* @file : USB_DEVICE
* @version : v2.0_Cube
* @brief : Header for usb_device file.
******************************************************************************
* This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools
* are owned by their respective copyright owners.
*
* Copyright (c) 2017 STMicroelectronics International N.V.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted, provided that the following conditions are met:
*
* 1. Redistribution of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific written permission.
* 4. This software, including modifications and/or derivative works of this
* software, must execute solely and exclusively on microcontroller or
* microprocessor devices manufactured by or for STMicroelectronics.
* 5. Redistribution and use of this software other than as permitted under
* this license is void and will automatically terminate your rights under
* this license.
*
* THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
* RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
* SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __usb_device_H
#define __usb_device_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx.h"
#include "stm32f0xx_hal.h"
#include "usbd_def.h"
extern USBD_HandleTypeDef hUsbDeviceFS;
/* USB_Device init function */
void MX_USB_DEVICE_Init(void);
#ifdef __cplusplus
}
#endif
#endif /*__usb_device_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

137
exixe_clock/firmware/clock12/Inc/usbd_cdc_if.h
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@@ -1,137 +0,0 @@
/**
******************************************************************************
* @file : usbd_cdc_if.h
* @brief : Header for usbd_cdc_if file.
******************************************************************************
* This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools
* are owned by their respective copyright owners.
*
* Copyright (c) 2017 STMicroelectronics International N.V.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted, provided that the following conditions are met:
*
* 1. Redistribution of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific written permission.
* 4. This software, including modifications and/or derivative works of this
* software, must execute solely and exclusively on microcontroller or
* microprocessor devices manufactured by or for STMicroelectronics.
* 5. Redistribution and use of this software other than as permitted under
* this license is void and will automatically terminate your rights under
* this license.
*
* THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
* RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
* SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_CDC_IF_H
#define __USBD_CDC_IF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "usbd_cdc.h"
/* USER CODE BEGIN INCLUDE */
/* USER CODE END INCLUDE */
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_CDC_IF
* @brief header
* @{
*/
/** @defgroup USBD_CDC_IF_Exported_Defines
* @{
*/
/* USER CODE BEGIN EXPORTED_DEFINES */
/* USER CODE END EXPORTED_DEFINES */
/**
* @}
*/
/** @defgroup USBD_CDC_IF_Exported_Types
* @{
*/
/* USER CODE BEGIN EXPORTED_TYPES */
/* USER CODE END EXPORTED_TYPES */
/**
* @}
*/
/** @defgroup USBD_CDC_IF_Exported_Macros
* @{
*/
/* USER CODE BEGIN EXPORTED_MACRO */
/* USER CODE END EXPORTED_MACRO */
/**
* @}
*/
/** @defgroup USBD_AUDIO_IF_Exported_Variables
* @{
*/
extern USBD_CDC_ItfTypeDef USBD_Interface_fops_FS;
/* USER CODE BEGIN EXPORTED_VARIABLES */
/* USER CODE END EXPORTED_VARIABLES */
/**
* @}
*/
/** @defgroup USBD_CDC_IF_Exported_FunctionsPrototype
* @{
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len);
/* USER CODE BEGIN EXPORTED_FUNCTIONS */
/* USER CODE END EXPORTED_FUNCTIONS */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __USBD_CDC_IF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

188
exixe_clock/firmware/clock12/Inc/usbd_conf.h
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@@ -1,188 +0,0 @@
/**
******************************************************************************
* @file : usbd_conf.h
* @version : v2.0_Cube
* @brief : Header for usbd_conf file.
******************************************************************************
* This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools
* are owned by their respective copyright owners.
*
* Copyright (c) 2017 STMicroelectronics International N.V.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted, provided that the following conditions are met:
*
* 1. Redistribution of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific written permission.
* 4. This software, including modifications and/or derivative works of this
* software, must execute solely and exclusively on microcontroller or
* microprocessor devices manufactured by or for STMicroelectronics.
* 5. Redistribution and use of this software other than as permitted under
* this license is void and will automatically terminate your rights under
* this license.
*
* THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
* RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
* SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_CONF__H__
#define __USBD_CONF__H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "stm32f0xx.h"
#include "stm32f0xx_hal.h"
#include "usbd_def.h"
/** @addtogroup USBD_OTG_DRIVER
* @{
*/
/** @defgroup USBD_CONF
* @brief usb otg low level driver configuration file
* @{
*/
/** @defgroup USBD_CONF_Exported_Defines
* @{
*/
/*---------- -----------*/
#define USBD_MAX_NUM_INTERFACES 1
/*---------- -----------*/
#define USBD_MAX_NUM_CONFIGURATION 1
/*---------- -----------*/
#define USBD_MAX_STR_DESC_SIZ 512
/*---------- -----------*/
#define USBD_SUPPORT_USER_STRING 0
/*---------- -----------*/
#define USBD_DEBUG_LEVEL 0
/*---------- -----------*/
#define USBD_SELF_POWERED 1
/*---------- -----------*/
#define MAX_STATIC_ALLOC_SIZE 512
/****************************************/
/* #define for FS and HS identification */
#define DEVICE_FS 0
/** @defgroup USBD_Exported_Macros
* @{
*/
/* Memory management macros */
#define USBD_malloc (uint32_t *)USBD_static_malloc
#define USBD_free USBD_static_free
#define USBD_memset /* Not used */
#define USBD_memcpy /* Not used */
#define USBD_Delay HAL_Delay
/* DEBUG macros */
#if (USBD_DEBUG_LEVEL > 0)
#define USBD_UsrLog(...) printf(__VA_ARGS__);\
printf("\n");
#else
#define USBD_UsrLog(...)
#endif
#if (USBD_DEBUG_LEVEL > 1)
#define USBD_ErrLog(...) printf("ERROR: ") ;\
printf(__VA_ARGS__);\
printf("\n");
#else
#define USBD_ErrLog(...)
#endif
#if (USBD_DEBUG_LEVEL > 2)
#define USBD_DbgLog(...) printf("DEBUG : ") ;\
printf(__VA_ARGS__);\
printf("\n");
#else
#define USBD_DbgLog(...)
#endif
/**
* @}
*/
/**
* @}
*/
/** @defgroup USBD_CONF_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CONF_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CONF_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CONF_Exported_FunctionsPrototype
* @{
*/
/**
* @}
*/
/* Exported functions ------------------------------------------------------- */
void *USBD_static_malloc(uint32_t size);
void USBD_static_free(void *p);
#ifdef __cplusplus
}
#endif
#endif /*__USBD_CONF__H__*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

119
exixe_clock/firmware/clock12/Inc/usbd_desc.h
View File

@@ -1,119 +0,0 @@
/**
******************************************************************************
* @file : usbd_desc.h
* @version : v2.0_Cube
* @brief : Header for usbd_desc file.
******************************************************************************
* This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools
* are owned by their respective copyright owners.
*
* Copyright (c) 2017 STMicroelectronics International N.V.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted, provided that the following conditions are met:
*
* 1. Redistribution of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific written permission.
* 4. This software, including modifications and/or derivative works of this
* software, must execute solely and exclusively on microcontroller or
* microprocessor devices manufactured by or for STMicroelectronics.
* 5. Redistribution and use of this software other than as permitted under
* this license is void and will automatically terminate your rights under
* this license.
*
* THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
* RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
* SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_DESC__H__
#define __USBD_DESC__H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "usbd_def.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USB_DESC
* @brief general defines for the usb device library file
* @{
*/
/** @defgroup USB_DESC_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_Variables
* @{
*/
extern USBD_DescriptorsTypeDef FS_Desc;
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_FunctionsPrototype
* @{
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __USBD_DESC_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

20
exixe_clock/firmware/clock12/MDK-ARM/RTE/_clock_test/RTE_Components.h
View File

@@ -1,20 +0,0 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'clock_test'
* Target: 'clock_test'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f0xx.h"
#endif /* RTE_COMPONENTS_H */

3439
exixe_clock/firmware/clock12/MDK-ARM/clock_test.uvguix.Allen
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1168
exixe_clock/firmware/clock12/MDK-ARM/clock_test.uvoptx
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799
exixe_clock/firmware/clock12/MDK-ARM/clock_test.uvprojx
View File

@@ -1,799 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>clock_test</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
<TargetOption>
<TargetCommonOption>
<Device>STM32F072C8</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F0xx_DFP.1.5.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x20003FFF) IROM(0x8000000-0x800FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId></DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32F072C8$SVD\STM32F0x2.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>clock_test\</OutputDirectory>
<OutputName>clock_test</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath></ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>0</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments>-REMAP</SimDllArguments>
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM0</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4103</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M0"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
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BIN
exixe_clock/firmware/clock12/MDK-ARM/clock_test/animations.crf
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68
exixe_clock/firmware/clock12/MDK-ARM/clock_test/animations.d
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@@ -1,68 +0,0 @@
clock_test\animations.o: ..\Src\animations.c
clock_test\animations.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\animations.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\animations.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\animations.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
clock_test\animations.o: ../Inc/shared.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\animations.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\animations.o: ../Inc/main.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\animations.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\animations.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\animations.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\animations.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\animations.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\animations.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\animations.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\animations.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\animations.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\animations.o: ../Inc/my_tasks.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
clock_test\animations.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
clock_test\animations.o: ../Inc/FreeRTOSConfig.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h
clock_test\animations.o: ../Inc/helpers.h
clock_test\animations.o: ../Inc/minmea.h
clock_test\animations.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
clock_test\animations.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
clock_test\animations.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\time.h
clock_test\animations.o: ../Inc/animations.h
clock_test\animations.o: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h

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clock_test\buttons.o: ..\Src\buttons.c
clock_test\buttons.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\buttons.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\buttons.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\buttons.o: ../Inc/buttons.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\buttons.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\buttons.o: ../Inc/main.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\buttons.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\buttons.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\buttons.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\buttons.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\buttons.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\buttons.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\buttons.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\buttons.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\buttons.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\buttons.o: ../Inc/helpers.h
clock_test\buttons.o: ../Inc/minmea.h
clock_test\buttons.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
clock_test\buttons.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
clock_test\buttons.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\time.h
clock_test\buttons.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
clock_test\buttons.o: ../Inc/shared.h

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exixe_clock/firmware/clock12/MDK-ARM/clock_test/clock_test.build_log.htm
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<html>
<body>
<pre>
<h1><EFBFBD>Vision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: <20>Vision V5.23.0.0
Copyright (C) 2017 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: deku nukem, dekunukem, LIC=2TT9U-SLY4Q-PEKH1-C1UZZ-YMS37-GJ9R5
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.23
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 4 (build 422)
Assembler: Armasm.exe V5.06 update 4 (build 422)
Linker/Locator: ArmLink.exe V5.06 update 4 (build 422)
Library Manager: ArmAr.exe V5.06 update 4 (build 422)
Hex Converter: FromElf.exe V5.06 update 4 (build 422)
CPU DLL: SARMCM3.DLL V5.23
Dialog DLL: DARMCM1.DLL V1.17.0.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V2.0.18.0
Dialog DLL: TARMCM1.DLL V1.12.0.0
<h2>Project:</h2>
C:\Users\Allen\Desktop\repos\exixe\firmware\clock12\MDK-ARM\clock_test.uvprojx
Project File Date: 08/16/2017
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 4 (build 422)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'clock_test'
compiling animations.c...
linking...
Program Size: Code=32252 RO-data=1068 RW-data=512 ZI-data=10072
"clock_test\clock_test.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.0.1.pack
ARM::CMSIS:CORE:5.0.1
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.0.1
<h2>Collection of Component include folders:</h2>
.\RTE\_clock_test
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.0.1\CMSIS\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F0xx_DFP\1.5.0\Device\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.0.1
Build Time Elapsed: 00:00:02
</pre>
</body>
</html>

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--cpu Cortex-M0
"clock_test\stm32f0xx_it.o"
"clock_test\main.o"
"clock_test\stm32f0xx_hal_msp.o"
"clock_test\usbd_conf.o"
"clock_test\freertos.o"
"clock_test\stm32f0xx_hal_timebase_tim.o"
"clock_test\usbd_desc.o"
"clock_test\usb_device.o"
"clock_test\usbd_cdc_if.o"
"clock_test\helpers.o"
"clock_test\my_usb.o"
"clock_test\my_tasks.o"
"clock_test\animations.o"
"clock_test\delay_us.o"
"clock_test\my_1wire.o"
"clock_test\ds18b20.o"
"clock_test\eeprom.o"
"clock_test\gps_config.o"
"clock_test\minmea.o"
"clock_test\config.o"
"clock_test\buttons.o"
"clock_test\system_stm32f0xx.o"
"clock_test\startup_stm32f072xb.o"
"clock_test\stm32f0xx_hal_cortex.o"
"clock_test\stm32f0xx_hal_gpio.o"
"clock_test\stm32f0xx_hal_rcc.o"
"clock_test\stm32f0xx_hal_spi.o"
"clock_test\stm32f0xx_hal_tim_ex.o"
"clock_test\stm32f0xx_hal_flash_ex.o"
"clock_test\stm32f0xx_hal_pwr.o"
"clock_test\stm32f0xx_hal_flash.o"
"clock_test\stm32f0xx_hal_spi_ex.o"
"clock_test\stm32f0xx_hal_tim.o"
"clock_test\stm32f0xx_hal_pcd_ex.o"
"clock_test\stm32f0xx_hal_pcd.o"
"clock_test\stm32f0xx_hal.o"
"clock_test\stm32f0xx_hal_pwr_ex.o"
"clock_test\stm32f0xx_hal_rcc_ex.o"
"clock_test\stm32f0xx_hal_dma.o"
"clock_test\stm32f0xx_hal_i2c_ex.o"
"clock_test\stm32f0xx_hal_i2c.o"
"clock_test\stm32f0xx_hal_uart.o"
"clock_test\stm32f0xx_hal_uart_ex.o"
"clock_test\stm32f0xx_hal_adc_ex.o"
"clock_test\stm32f0xx_hal_adc.o"
"clock_test\stm32f0xx_hal_rtc.o"
"clock_test\stm32f0xx_hal_rtc_ex.o"
"clock_test\stm32f0xx_hal_iwdg.o"
"clock_test\queue.o"
"clock_test\croutine.o"
"clock_test\tasks.o"
"clock_test\event_groups.o"
"clock_test\heap_1.o"
"clock_test\list.o"
"clock_test\cmsis_os.o"
"clock_test\timers.o"
"clock_test\port.o"
"clock_test\usbd_core.o"
"clock_test\usbd_ctlreq.o"
"clock_test\usbd_cdc.o"
"clock_test\usbd_ioreq.o"
--library_type=microlib --strict --scatter "clock_test\clock_test.sct"
--diag_suppress=L6329 --summary_stderr --info summarysizes --map --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list "clock_test.map" -o clock_test\clock_test.axf

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@@ -1,15 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00010000 { ; load region size_region
ER_IROM1 0x08000000 0x00010000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00004000 { ; RW data
.ANY (+RW +ZI)
}
}

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exixe_clock/firmware/clock12/MDK-ARM/clock_test/cmsis_os.d
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clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
clock_test\cmsis_os.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
clock_test\cmsis_os.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
clock_test\cmsis_os.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\cmsis_os.o: ../Inc/FreeRTOSConfig.h
clock_test\cmsis_os.o: ../Inc/main.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h
clock_test\cmsis_os.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h
clock_test\cmsis_os.o: ../Drivers/CMSIS/Include/cmsis_armcc.h

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clock_test\config.o: ..\Src\config.c
clock_test\config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\config.o: ../Inc/eeprom.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\config.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\config.o: ../Inc/main.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\config.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\config.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\config.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\config.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\config.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\config.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\config.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\config.o: ../Inc/helpers.h
clock_test\config.o: ../Inc/minmea.h
clock_test\config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
clock_test\config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
clock_test\config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\time.h
clock_test\config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
clock_test\config.o: ../Inc/shared.h
clock_test\config.o: ../Inc/config.h

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clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/croutine.c
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
clock_test\croutine.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
clock_test\croutine.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\croutine.o: ../Inc/FreeRTOSConfig.h
clock_test\croutine.o: ../Inc/main.h
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h
clock_test\croutine.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h

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clock_test\delay_us.o: ..\Src\delay_us.c
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\delay_us.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\delay_us.o: ../Inc/main.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\delay_us.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\delay_us.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\delay_us.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\delay_us.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\delay_us.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\delay_us.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\delay_us.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\delay_us.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\delay_us.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\delay_us.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\delay_us.o: ../Inc/delay_us.h

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clock_test\ds18b20.o: ..\Src\ds18b20.c
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\ds18b20.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\ds18b20.o: ../Inc/main.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\ds18b20.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\ds18b20.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\ds18b20.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\ds18b20.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\ds18b20.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\ds18b20.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\ds18b20.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\ds18b20.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\ds18b20.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\ds18b20.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\ds18b20.o: ../Inc/ds18b20.h
clock_test\ds18b20.o: ../Inc/my_1wire.h
clock_test\ds18b20.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\ds18b20.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\ds18b20.o: ../Inc/delay_us.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
clock_test\ds18b20.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
clock_test\ds18b20.o: ../Inc/FreeRTOSConfig.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h
clock_test\ds18b20.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h

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clock_test\eeprom.o: ..\Src\eeprom.c
clock_test\eeprom.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\eeprom.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\eeprom.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\eeprom.o: ../Inc/eeprom.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\eeprom.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\eeprom.o: ../Inc/main.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\eeprom.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\eeprom.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\eeprom.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\eeprom.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\eeprom.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\eeprom.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\eeprom.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\eeprom.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\eeprom.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\eeprom.o: ../Inc/helpers.h
clock_test\eeprom.o: ../Inc/minmea.h
clock_test\eeprom.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
clock_test\eeprom.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
clock_test\eeprom.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\time.h
clock_test\eeprom.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
clock_test\eeprom.o: ../Inc/shared.h

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clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
clock_test\event_groups.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
clock_test\event_groups.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
clock_test\event_groups.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\event_groups.o: ../Inc/FreeRTOSConfig.h
clock_test\event_groups.o: ../Inc/main.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
clock_test\event_groups.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h

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clock_test\freertos.o: ../Src/freertos.c
clock_test\freertos.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
clock_test\freertos.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
clock_test\freertos.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\freertos.o: ../Inc/FreeRTOSConfig.h
clock_test\freertos.o: ../Inc/main.h
clock_test\freertos.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
clock_test\freertos.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
clock_test\freertos.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
clock_test\freertos.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
clock_test\freertos.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
clock_test\freertos.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h
clock_test\freertos.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h

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clock_test\gps_config.o: ..\Src\gps_config.c
clock_test\gps_config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\gps_config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\gps_config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\gps_config.o: ../Inc/shared.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\gps_config.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\gps_config.o: ../Inc/main.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\gps_config.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\gps_config.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\gps_config.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\gps_config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\gps_config.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\gps_config.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\gps_config.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\gps_config.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\gps_config.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\gps_config.o: ../Inc/helpers.h
clock_test\gps_config.o: ../Inc/minmea.h
clock_test\gps_config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
clock_test\gps_config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
clock_test\gps_config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\time.h
clock_test\gps_config.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
clock_test\gps_config.o: ../Inc/gps_config.h

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clock_test\heap_1.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_1.c
clock_test\heap_1.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\heap_1.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
clock_test\heap_1.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
clock_test\heap_1.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\heap_1.o: ../Inc/FreeRTOSConfig.h
clock_test\heap_1.o: ../Inc/main.h
clock_test\heap_1.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
clock_test\heap_1.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
clock_test\heap_1.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
clock_test\heap_1.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
clock_test\heap_1.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
clock_test\heap_1.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h
clock_test\heap_1.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h

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clock_test\helpers.o: ..\Src\helpers.c
clock_test\helpers.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\helpers.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\helpers.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\helpers.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\time.h
clock_test\helpers.o: ../Inc/helpers.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\helpers.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\helpers.o: ../Inc/main.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\helpers.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\helpers.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\helpers.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\helpers.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\helpers.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\helpers.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\helpers.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\helpers.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\helpers.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\helpers.o: ../Inc/minmea.h
clock_test\helpers.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
clock_test\helpers.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
clock_test\helpers.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
clock_test\helpers.o: ../Inc/shared.h

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clock_test\list.o: ../Middlewares/Third_Party/FreeRTOS/Source/list.c
clock_test\list.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\list.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
clock_test\list.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
clock_test\list.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\list.o: ../Inc/FreeRTOSConfig.h
clock_test\list.o: ../Inc/main.h
clock_test\list.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
clock_test\list.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
clock_test\list.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
clock_test\list.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
clock_test\list.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
clock_test\list.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h

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@@ -1,73 +0,0 @@
clock_test\main.o: ../Src/main.c
clock_test\main.o: ../Inc/main.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\main.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\main.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\main.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\main.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\main.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\main.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\main.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\main.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
clock_test\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
clock_test\main.o: ../Inc/FreeRTOSConfig.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h
clock_test\main.o: ../Inc/usb_device.h
clock_test\main.o: ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h
clock_test\main.o: ../Inc/usbd_conf.h
clock_test\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\main.o: ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h
clock_test\main.o: ../Inc/shared.h
clock_test\main.o: ../Inc/my_usb.h
clock_test\main.o: ../Inc/helpers.h
clock_test\main.o: ../Inc/minmea.h
clock_test\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
clock_test\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
clock_test\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\time.h
clock_test\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
clock_test\main.o: ../Inc/my_tasks.h
clock_test\main.o: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h
clock_test\main.o: ../Inc/delay_us.h

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clock_test\minmea.o: ..\Src\minmea.c
clock_test\minmea.o: ../Inc/minmea.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\time.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\ctype.h
clock_test\minmea.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdarg.h

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exixe_clock/firmware/clock12/MDK-ARM/clock_test/my_1wire.d
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@@ -1,43 +0,0 @@
clock_test\my_1wire.o: ..\Src\my_1wire.c
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\my_1wire.o: ../Inc/stm32f0xx_hal_conf.h
clock_test\my_1wire.o: ../Inc/main.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h
clock_test\my_1wire.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
clock_test\my_1wire.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
clock_test\my_1wire.o: ../Drivers/CMSIS/Include/core_cm0.h
clock_test\my_1wire.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
clock_test\my_1wire.o: ../Drivers/CMSIS/Include/core_cmInstr.h
clock_test\my_1wire.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
clock_test\my_1wire.o: ../Drivers/CMSIS/Include/core_cmFunc.h
clock_test\my_1wire.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h
clock_test\my_1wire.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h
clock_test\my_1wire.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h
clock_test\my_1wire.o: ../Inc/my_1wire.h
clock_test\my_1wire.o: ../Inc/delay_us.h

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