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Written my first data --- it's kinda garbled, but there's definitely sectors in

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there!
This commit is contained in:
David Given
2018-10-06 23:30:14 +02:00
parent 30271d7e95
commit 443082f3c4
3 changed files with 57 additions and 8 deletions
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26
FluxEngine.cydsn/FluxEngine.cyprj
View File

@@ -2716,6 +2716,32 @@
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
<filters />
</CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0>
<CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFolderSerialize" version="3">
<CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtBaseContainerSerialize" version="1">
<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="Clock_5" persistent="">
<Hidden v="True" />
</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
<CyGuid_0820c2e7-528d-4137-9a08-97257b946089 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemListSerialize" version="2">
<dependencies>
<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="Clock_5.c" persistent="Generated_Source\PSoC5\Clock_5.c">
<Hidden v="True" />
</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
<build_action v="SOURCE_C;CortexM3;;;" />
<PropertyDeltas />
</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="Clock_5.h" persistent="Generated_Source\PSoC5\Clock_5.h">
<Hidden v="True" />
</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
<build_action v="HEADER;;;;" />
<PropertyDeltas />
</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
</dependencies>
</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
<filters />
</CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0>
</dependencies>
</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>

BIN
FluxEngine.cydsn/TopDesign/TopDesign.cysch
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39
FluxEngine.cydsn/main.c
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@@ -17,7 +17,6 @@
static volatile uint32_t clock = 0;
static volatile bool index_irq = false;
static volatile bool capture_dma_finished_irq = false;
static bool motor_on = false;
static uint32_t motor_on_time = 0;
@@ -361,13 +360,24 @@ static void cmd_write(struct write_frame* f)
bool listening = false;
bool finished = false;
int packets = (f->bytes_to_write+FRAME_SIZE-1) / FRAME_SIZE;
int count_read = 0;
int count_written = 0;
REPLAY_COUNTER_Start();
dma_writing_to_td = 0;
dma_reading_from_td = -1;
dma_underrun = false;
CyDmaChSetInitialTd(dma_channel, td[dma_writing_to_td]);
CyDmaClearPendingDrq(dma_channel);
int old_reading_from_td = -1;
for (;;)
{
if (dma_reading_from_td != old_reading_from_td)
{
count_written++;
old_reading_from_td = dma_reading_from_td;
}
if (dma_reading_from_td != -1)
{
/* We want to be writing to disk. */
@@ -383,6 +393,8 @@ static void cmd_write(struct write_frame* f)
writing = true;
ERASE_REG_Write(1); /* start erasing! */
CyDmaChEnable(dma_channel, 1); /* nothing will happen... */
CyDmaChSetRequest(dma_channel, CY_DMA_CPU_REQ); /* ...until we manually start the first transfer */
}
/* ...unless we reach the end of the track, of course. */
@@ -414,13 +426,13 @@ static void cmd_write(struct write_frame* f)
listening = false;
dma_writing_to_td = NEXT_BUFFER(dma_writing_to_td);
packets--;
count_read++;
}
/* Once we have enough data, we're ready to start writing. */
if (dma_reading_from_td == -1)
dma_reading_from_td = 0;
dma_reading_from_td = old_reading_from_td = 0;
}
}
@@ -428,16 +440,29 @@ static void cmd_write(struct write_frame* f)
{
print("stop writing\r");
WGATE_Write(0);
CyDmaChSetRequest(dma_channel, CY_DMA_CPU_TERM_CHAIN);
while (CyDmaChGetRequest(dma_channel))
;
REPLAY_COUNTER_Stop();
CyDmaChDisable(dma_channel);
}
if (dma_underrun)
{
print("underrun after ");
printi(count_read);
print(" packets read\r");
send_error(F_ERROR_UNDERRUN);
}
DECLARE_REPLY_FRAME(struct write_reply_frame, F_FRAME_WRITE_REPLY);
r.bytes_actually_written = f->bytes_to_write - (packets*FRAME_SIZE);
r.bytes_actually_written = count_written*FRAME_SIZE;
if (!finished)
{
if (!listening)
USBFS_EnableOutEP(FLUXENGINE_DATA_OUT_EP_NUM);
while (packets > 0)
while (count_read < packets)
{
if (USBFS_GetEPState(FLUXENGINE_DATA_OUT_EP_NUM) == USBFS_OUT_BUFFER_FULL)
{
@@ -445,7 +470,7 @@ static void cmd_write(struct write_frame* f)
if (length < FRAME_SIZE)
break;
USBFS_EnableOutEP(FLUXENGINE_DATA_OUT_EP_NUM);
packets--;
count_read++;
}
}
USBFS_DisableOutEP(FLUXENGINE_DATA_OUT_EP_NUM);
@@ -524,12 +549,10 @@ int main(void)
if (!USBFS_GetConfiguration() || USBFS_IsConfigurationChanged())
{
//CyDmaChDisable(dma_channel);
UART_PutString("Waiting for USB...\r");
while (!USBFS_GetConfiguration())
;
UART_PutString("USB ready\r");
//CyDmaChEnable(dma_channel, true);
USBFS_EnableOutEP(FLUXENGINE_CMD_OUT_EP_NUM);
}