David Given
072a097003
Archival (non-functioning) checkin of Verilog-based sampler code. Sadly, we've
...
run into size limits for the device, and I need to slim down.
2019-12-11 22:51:27 +01:00
David Given
08cb20fd1d
Remove the old, broken, Verilog sampler.
2019-02-27 23:57:13 +01:00
David Given
34a4c888b5
Rewrite the Verilog *again*, and increase the CPU clock rate --- it's now a
...
little more reliable at reading long intervals off disk, but does seem to be
doing it. I'm going to definitely need some better sampling logic here and
probably a FIFO. But it'll do for now.
2019-02-23 19:51:27 +01:00
David Given
a77925fe64
Replace the complicated sampler with 10 lines of Verilog; the hardware should
...
now be able to handle any length of transition. And it's simpler.
2019-02-22 20:01:34 +01:00
