udpated README
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@@ -17,6 +17,7 @@
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// cribbed from the baudrate generator here:
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// https://gitlab.alfter.us/salfter/68b50-dual-serial/-/raw/202e1a1a8720a4ca1aa0a76b04521c2a77b40721/68b50-dual-serial.pdf?inline=false
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// (which, in turn, can be found at https://www.onsemi.com/pub/Collateral/AND8001-D.PDF#page=3)
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module div3(clk, r, q);
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input wire clk;
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