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fpga-stuff
==========
Just a playground for me to figure out FPGAs, Verilog, etc. I found the [TinyFPGA BX](https://www.crowdsupply.com/tinyfpga/tinyfpga-ax-bx#products)
I had bought a while ago, so I'm using that with one of my [Mini-I/O 16](https://www.tindie.com/products/salfter/mini-io-16/) boards (of which I
should finish assembling the latest batch and put them back up for sale :-) ), so most of the code targets that board for synthesis with the
open-source [Yosys](https://yosyshq.net/yosys/)/[nextpnr](https://github.com/YosysHQ/nextpnr)/[icestorm](https://github.com/YosysHQ/icestorm)
toolchain. Some (slightly) older projects use [Icarus Verilog](https://github.com/steveicarus/iverilog) for simulation, but the
[tutorial](https://zipcpu.com/tutorial/) I'm currently following uses [Verilator](https://www.veripool.org/verilator/).
Before I found my TinyFPGA BX, I was considering picking up an UPduino. That's why there are some UPduino-related bits in here.
You might find the tinyfpga-template useful for your own projects; it's the icestorm template from [the TinyFPGA BX repo](https://github.com/tinyfpga/TinyFPGA-BX),
modified to use nextpnr instead of arachne-pnr and with Verilator support added (use ```make verilate``` to simulate).