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README.md
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README.md
@@ -152,6 +152,32 @@ same from N true random bits as M biased bits in this case.
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The program infnoise.c directly measures the entropy of INM output, and compares this to
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the estimated value. Simulations show that they correlate well.
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There are two significant variations on the INM architecture so far. The first one, done
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with CMOS transistors, which is suitable for an IC implementation, does a multiply by 2 by
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stacking capacitors, and if the result is greather than Vref, it subtracts a value (using
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a capacitor again) to reduce the value to below Vref. This is a literal implementation of
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multiplication mod Vref.
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The board level versions were simplified using a couple of tricks. First, multiplication
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by 2 modulo Vsup is accomplished by multiplying relative to either GND or Vsup. When
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multiplying relative to GND, a 0.2V signal becomes 0.4V. When multiplying relative to a
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3V Vsup, a 2.8V signal becomes 2.6V. The math comes out the same as if I'd multiplied
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relative to GND, and simply subtracted Vsup if the result was > Vsup:
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Vsup - 2*(Vsup - A) = Vsup = 2*Vsup + 2*A = 2*A - Vsup
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So, we multiply by 2 either way, and only subtract out Vsup if needed. This is identical
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to multiplication modulo Vsup.
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A second trick used to create the "small" version was to notice that the output of the
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comparator could be used to combine both multiplier op-amps into 1. This abuse of the
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comparator output needs to be carefully checked. In particular, the output is generally
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treated as a digital signal, but in this case, it is used as an analog singal. Care
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should be taken not to load the OUT signal significantly, and also to be sure the
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comparator can drive the resistive load with no more droop than the buffer driving signal
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B. However, don't be concerned about noise. Cross-talk is OK. It can only add to the
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entropy.
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### Free As in Freedom
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I, Bill Cox, came up with the original CMOS based Infinite Noise Multiplier architecture
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