* Added precompiled RAYSTONES, DHRYSONES and COREMARK

* Experimental pipelineZ.v with two shifters (left and right), and
  pipelined register Id comparison.

FemtoRV/FIRMWARE/EXAMPLES/DATA/test_ST_NICCC.c

@@ -74,7 +74,7 @@ int read_frame() {
 	   (frame_flags & INDEXED_BIT) ? 'I' : '_'
     );
    
-    if(frame_flag & CLEAR_BIT) {
+    if(frame_flags & CLEAR_BIT) {
 	/*
 	 * clear the screen now:
 	 * GL_clear();
@@ -171,7 +171,7 @@ int read_frame() {
 
 
 int main() {
-    stream = fopen("scene1.bin","rb");
+    stream = fopen("scene1.dat","rb");
     while(read_frame()) {
     }
 }

FemtoRV/FIRMWARE/EXAMPLES/ST_NICCC_spi_flash.c

@@ -206,7 +206,9 @@ int read_frame() {
 int main() {
     GL_init(GL_MODE_OLED);
     GL_clear();
-
+    MAX7219_tty_init();
+    printf("3.2.1.GO!! ");
+    
     wireframe = 0;
 
     for(;;) {

FemtoRV/FIRMWARE/EXAMPLES/tty_OLED.c

@@ -7,8 +7,8 @@ int main() {
    for(;;) {
       int c = getchar();
       if(c != 10 && c !=13) {
-	 // putchar(c);
-	 printf("char=%d\n", (int)c);
+	 putchar(c);
+	 // printf("char=%d\n", (int)c);
       } else {
 	 putchar('\n');
 	 putchar(']');

FemtoRV/Makefile

@@ -30,9 +30,9 @@ clean:
 TERMS=/dev/ttyUSB1 /dev/ttyUSB0 
 
 # Uncomment one of the following lines (pick your favorite term emulator)
-terminal: terminal_miniterm
+#terminal: terminal_miniterm
 #terminal: terminal_screen
-#terminal: terminal_picocom
+terminal: terminal_picocom
 
 # make terminal, rule for miniterm
 # exit: <ctrl> ]     package: sudo apt-get install python3-serial

FemtoRV/RTL/PROCESSOR/femtorv32_quark.v

@@ -79,21 +79,14 @@ module FemtoRV32(
    // Base RISC-V (RV32I) has only 10 different instructions !
    wire isLoad    =  (instr[6:2] == 5'b00000); // rd <- mem[rs1+Iimm]
    wire isALUimm  =  (instr[6:2] == 5'b00100); // rd <- rs1 OP Iimm
-   wire isAUIPC   =  (instr[6:2] == 5'b00101); // rd <- PC + Uimm
    wire isStore   =  (instr[6:2] == 5'b01000); // mem[rs1+Simm] <- rs2
    wire isALUreg  =  (instr[6:2] == 5'b01100); // rd <- rs1 OP rs2
-   wire isLUI     =  (instr[6:2] == 5'b01101); // rd <- Uimm
-   wire isBranch  =  (instr[6:2] == 5'b11000); // if(rs1 OP rs2) PC<-PC+Bimm
-   wire isJALR    =  (instr[6:2] == 5'b11001); // rd <- PC+4; PC<-rs1+Iimm
-   // wire isJAL     =  (instr[6:2] == 5'b11011); // rd <- PC+4; PC<-PC+Jimm
    wire isSYSTEM  =  (instr[6:2] == 5'b11100); // rd <- cycles
-
-   wire isJAL    = instr[3]; 
-   //wire isJALR   = {instr[6], instr[3], instr[2]} == 3'b101; 
-   //wire isLUI    = instr[6:4] == 3'b111; 
-   //wire isAUIPC  = instr[6:4] == 3'b101; 
-   //wire isBranch = {instr[6], instr[4], instr[2]} == 3'b100; 
-
+   wire isJAL     =  instr[3]; // (instr[6:2] == 5'b11011); // rd <- PC+4; PC<-PC+Jimm
+   wire isJALR    =  (instr[6:2] == 5'b11001); // rd <- PC+4; PC<-rs1+Iimm
+   wire isLUI     =  (instr[6:2] == 5'b01101); // rd <- Uimm
+   wire isAUIPC   =  (instr[6:2] == 5'b00101); // rd <- PC + Uimm
+   wire isBranch  =  (instr[6:2] == 5'b11000); // if(rs1 OP rs2) PC<-PC+Bimm
 
    wire isALU = isALUimm | isALUreg;
 

FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/FIRMWARE/Makefile

@@ -1,6 +1,6 @@
 include ../../../FIRMWARE/makefile.inc
 RVASFLAGS=-march=$(ARCH) -mabi=$(ABI) 
-RVCFLAGS=-I. -O6 -fno-pic -march=$(ARCH) -mabi=$(ABI) -fno-stack-protector -w -Wl,--no-relax
+RVCFLAGS=-I. -O2 -fno-pic -march=$(ARCH) -mabi=$(ABI) -fno-stack-protector -w -Wl,--no-relax
 
 RAM_SIZE=6144
 

FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/FIRMWARE/pi.c

@@ -180,6 +180,6 @@ void main() {
     printf("\npi = 3.");
     for(int n=1; ;n+=9) {
        printf("%d",digits(n));
-//       if(n > 36) break;
+       if(n > 36) break;
     }
 }

FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/README.md

@@ -23,7 +23,8 @@ it is not as fun).
 - in the end, the obtained processor is not the most efficient, but it is not a toy:
   it can execute any program. To anwser the question you may ask, yes, it
   [runs DOOM](https://github.com/BrunoLevy/learn-fpga/tree/master/LiteX/software/Doom)!
-  (with the help of LiteX that has a nice SDRAM controller, because Doom needs some RAM);
+  (but not on an IceStick, you will need a larger FPGA). It works with the help of LiteX that 
+  has a nice SDRAM controller, because Doom needs some RAM;
 - the tutorial is both about hardware and software: you will learn how to compile programs
   in assembly and in C for your core;
 - I try to make all example programs fun and interesting while reasonably short. The bundled

FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/pipelineY.v

@@ -9,7 +9,7 @@
 `define CONFIG_RAS        // return address stack
 `define CONFIG_GSHARE     // gshare branch prediction (or BTFNT if not set)
 
-`define CONFIG_RV32M      // RV32M instruction set (MUL,DIV,REM)
+//`define CONFIG_RV32M      // RV32M instruction set (MUL,DIV,REM)
 
 //`define CONFIG_DEBUG      // debug mode, displays execution
                             // See "debugger" section in source 
@@ -465,7 +465,7 @@ module Processor (
    wire        E_LT  = 
                  (E_aluIn1[31] ^ E_aluIn2[31]) ? E_aluIn1[31] : E_aluMinus[32];
    wire        E_LTU = E_aluMinus[32];
-   wire        E_EQ  = (E_aluMinus[31:0] == 0);
+   wire        E_EQ  = (E_aluIn1 == E_aluIn2);  // (E_aluMinus[31:0] == 0);
 
    // Flip a 32 bit word. Used by the shifter (a single shifter for
    // left and right shifts, saves silicium !)
@@ -477,7 +477,7 @@ module Processor (
 		x[24], x[25], x[26], x[27], x[28], x[29], x[30], x[31]};
    endfunction
 
-   wire [31:0] E_shifter_in = (DE_funct3==3'b001) ? flip32(E_aluIn1) : E_aluIn1;
+   wire [31:0] E_shifter_in = DE_funct3_is[1] ? flip32(E_aluIn1) : E_aluIn1;
    
    /* verilator lint_off WIDTH */
    wire [31:0] E_shifter =