Up to date instructions to install nextpnr-xilinx

Simple example using it

Basic/ARTY/ARTY_blink/arty.xdc

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+# R
+set_property LOC G6 [get_ports led[0]]
+set_property LOC G3 [get_ports led[1]]
+set_property LOC J3 [get_ports led[2]]
+set_property LOC K1 [get_ports led[3]]
+# G
+set_property LOC F6 [get_ports led[4]]
+set_property LOC J4 [get_ports led[5]]
+set_property LOC J2 [get_ports led[6]]
+set_property LOC H6 [get_ports led[7]]
+# B
+set_property LOC E1 [get_ports led[8]]
+set_property LOC G4 [get_ports led[9]]
+set_property LOC H4 [get_ports led[10]]
+set_property LOC K2 [get_ports led[11]]
+
+# second row
+# set_property LOC H5 [get_ports led[12]]
+# set_property LOC J5 [get_ports led[13]]
+# set_property LOC T9 [get_ports led[14]]
+# set_property LOC T10 [get_ports led[15]]
+
+set_property IOSTANDARD LVCMOS33 [get_ports led[0]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[1]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[2]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[3]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[4]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[5]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[6]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[7]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[8]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[9]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[10]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[11]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[12]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[13]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[14]]
+set_property IOSTANDARD LVCMOS33 [get_ports led[15]]
+
+set_property LOC A8 [get_ports sw[0]]
+set_property LOC C11 [get_ports sw[1]]
+set_property LOC C10 [get_ports sw[2]]
+set_property LOC A10 [get_ports sw[3]]
+
+set_property IOSTANDARD LVCMOS33 [get_ports sw[0]]
+set_property IOSTANDARD LVCMOS33 [get_ports sw[1]]
+set_property IOSTANDARD LVCMOS33 [get_ports sw[2]]
+set_property IOSTANDARD LVCMOS33 [get_ports sw[3]]
+
+set_property LOC E3 [get_ports clk_i]
+set_property IOSTANDARD LVCMOS33 [get_ports clk_i]

Basic/ARTY/ARTY_blink/blinky.v

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+module top (input clk_i, input [3:0] sw, output [11:0] led);
+
+    //assign led = {&sw, |sw, ^sw, ~^sw};
+
+    wire clk;
+    BUFGCTRL bufg_i (
+        .I0(clk_i),
+        .CE0(1'b1),
+        .S0(1'b1),
+        .O(clk)
+    );
+
+
+  //  wire clk = clk_i;
+
+    reg clkdiv;
+    reg [22:0] ctr;
+
+    always @(posedge clk) {clkdiv, ctr} <= ctr + 1'b1;
+
+    reg [5:0] led_r = 4'b0000;
+
+    always @(posedge clk) begin
+        if (clkdiv)
+            led_r <= led_r + 1'b1;
+    end
+
+    wire [11:0] led_s = led_r[3:0] << (4 * led_r[5:4]);
+
+    assign led = &(led_r[5:4]) ? {3{led_r[3:0]}} : led_s;
+
+endmodule

Basic/ARTY/ARTY_blink/makeit.sh

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+#!/usr/bin/env bash
+PROJECT_NAME=blinky
+DB_DIR=/usr/share/nextpnr/prjxray-db
+CHIPDB_DIR=/usr/share/nextpnr/xilinx-chipdb
+PART=xc7a35tcsg324-1
+
+set -ex
+yosys -p "synth_xilinx -flatten -abc9 -nobram -arch xc7 -top top; write_json ${PROJECT_NAME}.json" ${PROJECT_NAME}.v
+nextpnr-xilinx --chipdb ${CHIPDB_DIR}/xc7a35t.bin --xdc arty.xdc --json ${PROJECT_NAME}.json --write ${PROJECT_NAME}_routed.json --fasm ${PROJECT_NAME}.fasm
+fasm2frames --part ${PART} --db-root ${DB_DIR}/artix7 ${PROJECT_NAME}.fasm > ${PROJECT_NAME}.frames
+xc7frames2bit --part_file ${DB_DIR}/artix7/${PART}/part.yaml --part_name ${PART} --frm_file ${PROJECT_NAME}.frames --output_file ${PROJECT_NAME}.bit
+#To send to SRAM:
+openFPGALoader --board arty ${PROJECT_NAME}.bit
+#To send to FLASH: 
+#openFPGALoader --board arty -f ${PROJECT_NAME}.bit