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New system with default configs in RTL/CONFIGS, included by

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femtosoc_config.v
This commit is contained in:
Bruno Levy
2021-01-03 19:07:15 +01:00
parent 76c08449f9
commit 81770a6ff6
15 changed files with 162 additions and 16 deletions
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16
Basic/ULX3S_hdmi/TMDS_encoder.v
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@@ -11,7 +11,21 @@ module TMDS_encoder(
wire [3:0] Nb1s = VD[0] + VD[1] + VD[2] + VD[3] + VD[4] + VD[5] + VD[6] + VD[7];
wire XNOR = (Nb1s>4'd4) || (Nb1s==4'd4 && VD[0]==1'b0);
wire [8:0] q_m = {~XNOR, q_m[6:0] ^ VD[7:1] ^ {7{XNOR}}, VD[0]};
// [Bruno Levy Jan 2021]
// Compact writing: wire [8:0] q_m = {~XNOR, q_m[6:0] ^ VD[7:1] ^ {7{XNOR}}, VD[0]};
// ... generates combinatorial loop warning, so I'd rather expand it (less compact,
// less elegant, but I did not like this combinatorial loop warning).
wire [8:0] q_m;
assign q_m[0] = VD[0];
assign q_m[1] = q_m[0] ^ VD[1] ^ XNOR;
assign q_m[2] = q_m[1] ^ VD[2] ^ XNOR;
assign q_m[3] = q_m[2] ^ VD[3] ^ XNOR;
assign q_m[4] = q_m[3] ^ VD[4] ^ XNOR;
assign q_m[5] = q_m[4] ^ VD[5] ^ XNOR;
assign q_m[6] = q_m[5] ^ VD[6] ^ XNOR;
assign q_m[7] = q_m[6] ^ VD[7] ^ XNOR;
assign q_m[8] = ~XNOR;
reg [3:0] balance_acc = 0;
wire [3:0] balance = q_m[0] + q_m[1] + q_m[2] + q_m[3] + q_m[4] + q_m[5] + q_m[6] + q_m[7] - 4'd4;

4
FemtoRV/FIRMWARE/make_firmware.sh
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@@ -1,9 +1,9 @@
rm -f ../RTL/RAM_size.v
echo "============> Compiling libs"
(cd LIBFEMTORV32; make clean all > /dev/null) # Compile hardware support lib
(cd LIBFEMTOC; make clean all > /dev/null) # Compile lib with printf() replacement function
(cd CRT_BAREMETAL; make clean all > /dev/null) # Compile C runtime for baremetal
(cd CRT_BAREMETAL; make clean all > /dev/null) # Compile C runtime for baremetal
# Note: I 'make clean' each time, because there is no much to recompile (and dependencies
# are not specified)...

7
FemtoRV/FIRMWARE/makefile.inc
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@@ -79,9 +79,12 @@ RVLDFLAGS=-m elf32lriscv -b elf32-littleriscv --no-relax
# at address 0 (firmware for IceStick, or femtOS commander.c for ULX3S). The rules
# to generate standard (.elf) or bare metal (.bm_elf) executables are in EXAMPLES/Makefile
%.hex: %.bm_elf $(FIRMWARE_DIR)/TOOLS/firmware_words
$(FIRMWARE_DIR)/TOOLS/firmware_words $< -verilog $(FIRMWARE_DIR)/../RTL/femtosoc_config.v -hex $@
%.hex: %.bm_elf $(FIRMWARE_DIR)/TOOLS/firmware_words $(FIRMWARE_DIR)/../RTL/RAM_size.v
$(FIRMWARE_DIR)/TOOLS/firmware_words $< -verilog $(FIRMWARE_DIR)/../RTL/RAM_size.v -hex $@
$(FIRMWARE_DIR)/../RTL/RAM_size.v:
(cd $(FIRMWARE_DIR)/..; make get_RAM_size)
##############################################################################################
.PHONY: root clean all get_riscv_toolchain

7
FemtoRV/Makefile
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@@ -37,4 +37,9 @@ testbench:
lint:
verilator --lint-only -DPASSTHROUGH_PLL --top-module $(PROJECTNAME) -IRTL -IRTL/PROCESSOR -IRTL/DEVICES -IRTL/PLL $(VERILOGS)
#######################################################################################################################
#######################################################################################################################
get_RAM_size:
(cd RTL; iverilog -IPROCESSOR -IDEVICES get_RAM_size.v -o get_RAM_size.vvp; vvp get_RAM_size.vvp > RAM_size.v; rm -f get_RAM_size.vvp)
#######################################################################################################################

43
FemtoRV/RTL/CONFIGS/icestick_default.v Normal file
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@@ -0,0 +1,43 @@
// Default femtosoc configuration file for IceStick
/************************* Devices **********************************************************************************/
`define NRV_IO_LEDS // Mapped IO, LEDs D1,D2,D3,D4 (D5 is used to display errors)
`define NRV_IO_UART // Mapped IO, virtual UART (USB)
//`define NRV_IO_SSD1351 // Mapped IO, 128x128x64K OLed screen
//`define NRV_IO_MAX7219 // Mapped IO, 8x8 led matrix
//`define NRV_IO_SPI_FLASH // Mapped IO, SPI flash
//`define NRV_MAPPED_SPI_FLASH // SPI flash mapped in address space. Use with MINIRV32 to run code from SPI flash.
/************************* Frequency ********************************************************************************/
`define NRV_FREQ 50 // Frequency in MHz. Recomm: 50 MHz (FOMU: 16MHz) Overclocking: 80-100 MHz (HX1K, ECP5)
/************************* RAM (in bytes, needs to be a multiple of 4)***********************************************/
`define NRV_RAM 6144 // default for ICESTICK (cannot do more !)
//`define NRV_RAM 1024 // small ICESTICK config (to further save LUTs if need be)
/************************* Processor configuration ******************************************************************/
//`define NRV_MINIRV32 // Mini config, can execute code stored in SPI flash from 1Mb offset (mapped to address 0x800000)
`ifndef NRV_MINIRV32 // The options below are not supported by minifemtorv32
//`define NRV_CSR // Uncomment if using something below (counters,...)
//`define NRV_COUNTERS // Uncomment for instr and cycle counters (won't fit on the ICEStick)
//`define NRV_COUNTERS_64 // ... and uncomment this one as well if you want 64-bit counters
`define NRV_TWOSTAGE_SHIFTER // if not RV32M, comment-out if running out of LUTs (at the expense of slower shifts)
//`define NRV_LATCH_ALU // Uncomment to latch all ALU ops (reduces critical path)
`endif
/************************* Advanced processor configuration *********************************************************/
`define NRV_RESET_ADDR 0 // The address the processor jumps to on reset
//`define NRV_RESET_ADDR 32'h00800000 // If using NRV_MINIRV32 and mapped SPI Flash, you may want to jump to
// a bootloader or firmware stored there.
`define NRV_IO_HARDWARE_CONFIG // Comment-out to disable hardware config registers mapped in IO-Space
// (only if you use your own firmware, libfemtorv32 depends on it)
/******************************************************************************************************************/
`define NRV_FEMTOSOC_CONFIGURED

39
FemtoRV/RTL/CONFIGS/ulx3s_default.v Normal file
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@@ -0,0 +1,39 @@
// Default femtosoc configuration file for ULX3S
/************************* Devices **********************************************************************************/
`define NRV_IO_LEDS // Mapped IO, LEDs D1,D2,D3,D4 (D5 is used to display errors)
`define NRV_IO_UART // Mapped IO, virtual UART (USB)
`define NRV_IO_SSD1351 // Mapped IO, 128x128x64K OLed screen
//`define NRV_IO_MAX7219 // Mapped IO, 8x8 led matrix
//`define NRV_IO_SPI_FLASH // Mapped IO, SPI flash
`define NRV_IO_SDCARD // Mapped IO, SPI SDCARD
`define NRV_IO_BUTTONS // Mapped IO, buttons
//`define NRV_MAPPED_SPI_FLASH // SPI flash mapped in address space. Use with MINIRV32 to run code from SPI flash.
`define NRV_IO_FGA // Femto Graphic Adapter (ULX3S only)
/************************* Frequency ********************************************************************************/
`define NRV_FREQ 80 // Frequency in MHz. Recomm: 50 MHz (FOMU: 16MHz) Overclocking: 80-100 MHz (HX1K, ECP5)
/************************* RAM (in bytes, needs to be a multiple of 4)***********************************************/
//`define NRV_RAM 393216 // bigger config for ULX3S
`define NRV_RAM 262144 // default for ULX3S
/************************* Processor configuration ******************************************************************/
`define NRV_CSR // Uncomment if using something below (counters,...)
`define NRV_COUNTERS // Uncomment for instr and cycle counters (won't fit on the ICEStick)
`define NRV_COUNTERS_64 // ... and uncomment this one as well if you want 64-bit counters
`define NRV_RV32M // Uncomment for hardware mul and div support (RV32M instructions). Not supported on IceStick !
`define NRV_LATCH_ALU // Uncomment to latch all ALU ops (reduces critical path)
/************************* Advanced processor configuration *********************************************************/
`define NRV_RESET_ADDR 0 // The address the processor jumps to on reset
`define NRV_IO_HARDWARE_CONFIG // Comment-out to disable hardware config registers mapped in IO-Space
// (only if you use your own firmware, libfemtorv32 depends on it)
/********************************************************************************************************************/
`define NRV_FEMTOSOC_CONFIGURED

8
FemtoRV/RTL/DEVICES/FGA.v
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@@ -60,8 +60,9 @@ module FGA(
row_start <= 0;
pix_address <= 0;
end else begin
// Increment row address every 2 Y (2 because 320x200->640x400)
if(Y[0]) begin
row_start <= row_start + 640;
row_start <= row_start + 640;
pix_address <= row_start + 640;
end else begin
pix_address <= row_start;
@@ -85,9 +86,6 @@ module FGA(
// RGB TMDS encoding
// Generate 10-bits TMDS red,green,blue signals. Blue embeds HSync/VSync in its
// control part.
//
// Note: Yosys finds a combinatorial loop here, but I do not understand why (and
// it seems to work though). TO BE UNDERSTOOD.
wire [9:0] TMDS_R, TMDS_G, TMDS_B;
TMDS_encoder encode_R(.clk(pixel_clk), .VD(R), .CD(2'b00) , .VDE(DrawArea), .TMDS(TMDS_R));
TMDS_encoder encode_G(.clk(pixel_clk), .VD(G), .CD(2'b00) , .VDE(DrawArea), .TMDS(TMDS_G));
@@ -98,7 +96,7 @@ module FGA(
wire clk_TMDS; // The 250 MHz clock used by the serializers.
HDMI_clock hdmi_clock(.clk(pixel_clk), .hdmi_clk(clk_TMDS));
// Modulo-10 clock divider
// Modulo-10 clock divider (my version, using a 1-hot in a 10 bits ring)
reg [9:0] TMDS_mod10=1;
wire TMDS_shift_load = TMDS_mod10[9];
always @(posedge clk_TMDS) TMDS_mod10 <= {TMDS_mod10[8:0],TMDS_mod10[9]};

2
FemtoRV/RTL/PROCESSOR/femtorv32.v
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@@ -429,7 +429,7 @@ module FemtoRV32 #(
// also waits from data from IO (listens to mem_rbusy)
// Next state: linear execution flow-> update instr with lookahead and prepare next lookahead
state[WAIT_ALU_OR_DATA_bit]: begin
`verbose($display(" mem_rbusy:%b alu_busy:%b",mem_rbusy,alu_busy));
`verbose($display(" mem_rbusy:%b alu_busy:%b",mem_rbusy,aluBusy));
if(!aluBusy && !mem_rbusy) begin
instr <= nextInstr;
addressReg <= PCplus4;

2
FemtoRV/RTL/femtosoc.v
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@@ -7,6 +7,8 @@
/*************************************************************************************/
`default_nettype none // Makes it easier to detect typos !
`include "femtosoc_config.v" // User configuration of processor and SOC.
`ifdef NRV_MINIRV32

14
FemtoRV/RTL/femtosoc_config.v
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@@ -1,5 +1,11 @@
// Configuration file for femtosoc/femtorv32
// Uncomment one of the following lines, OR fine-tune the options below.
//`include "CONFIGS/ulx3s_default.v"
`include "CONFIGS/icestick_default.v"
`ifndef NRV_FEMTOSOC_CONFIGURED
/************************* Devices **********************************************************************************/
`define NRV_IO_LEDS // Mapped IO, LEDs D1,D2,D3,D4 (D5 is used to display errors)
@@ -19,8 +25,8 @@
/************************* RAM (in bytes, needs to be a multiple of 4)***********************************************/
//`define NRV_RAM 393216 // bigger config for ULX3S
//`define NRV_RAM 262144 // default for ULX3S
`define NRV_RAM 6144 // default for ICESTICK (cannot do more !)
`define NRV_RAM 262144 // default for ULX3S
//`define NRV_RAM 6144 // default for ICESTICK (cannot do more !)
//`define NRV_RAM 1024 // small ICESTICK config (to further save LUTs if need be)
/************************* Processor configuration ******************************************************************/
@@ -44,6 +50,8 @@
`define NRV_IO_HARDWARE_CONFIG // Comment-out to disable hardware config registers mapped in IO-Space
// (only if you use your own firmware, libfemtorv32 depends on it)
`endif
/*
* Uncomment if the RESET button is wired and active low:
* (wire a push button and a pullup resistor to
@@ -98,6 +106,4 @@
`define ECP5
`endif
`default_nettype none // Makes it easier to detect typos !
/******************************************************************************************************************/

12
FemtoRV/RTL/get_RAM_size.v Normal file
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@@ -0,0 +1,12 @@
/*
* A dummy IVERILOG module just to get the configured amount of RAM.
*/
`include "femtosoc_config.v"
module print_RAM();
initial begin
$display("`define NRV_RAM %d",`NRV_RAM);
end
endmodule

6
FemtoRV/TUTORIALS/ECP5_EVN.md
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@@ -107,6 +107,12 @@ Note that there are several alternatives, such as OpenOCD. If you prefer to use
you will need to edit `Makefile` (see commented-out line in
`ECP5_EVN.prog` target)
icarus/iverilog and verilator
-----------------------------
```
apt-get install iverilog verilator
```
Step 2: Configure USB rules
===========================
We need to let normal users program the ULX3S through USB. This

6
FemtoRV/TUTORIALS/FOMU.md
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@@ -89,6 +89,12 @@ $ make -j 4
$ sudo make install
```
icarus/iverilog and verilator
-----------------------------
```
apt-get install iverilog verilator
```
Step 2: Configure DFU and USB rules
===================================

6
FemtoRV/TUTORIALS/IceStick.md
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@@ -98,6 +98,12 @@ $ make -j 4
$ sudo make install
```
icarus/iverilog and verilator
-----------------------------
```
apt-get install iverilog verilator
```
Step 2: Configure USB rules
===========================
We need to let normal users program the IceStick through USB. This

6
FemtoRV/TUTORIALS/ULX3S.md
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@@ -101,6 +101,12 @@ git clone https://github.com/emard/ulx3s-bin
sudo cp ulx3s-bin/usb-jtag/linux-amd64/ujprog /usr/local/bin
```
icarus/iverilog and verilator
-----------------------------
```
apt-get install iverilog verilator
```
Step 2: Configure USB rules
===========================
We need to let normal users program the ULX3S through USB. This