Bruno Levy
a3bf451723
testdrive-RV32M, simplified a bit DIV/REM implementation, gained a
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little bit: now validates at 90MHz and works at 115 MHz
2021-09-04 17:33:39 +02:00
Bruno Levy
6fb37f1419
* now firmware compilation files defined in processor VERILOG sources
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* firmware_words has a -max_addr arg to define valid maximum address
* 800x600 HDMI mode (1024x768 can not always be met by timings)
* included femtorv32-intermissum and femtorv32-gracilis cores by Matthias Koch
2021-07-11 10:55:04 +02:00
Bruno Levy
604b5aa096
Cleanup, factorizing PLL declarations, now we just have a couple
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of parameters associated with each mode.
2021-04-26 19:41:36 +02:00
Bruno Levy
5654e2d438
Back to separate pixclk generation.
2021-04-26 19:22:27 +02:00
Bruno Levy
1ccb77145c
simplifying design: generating pixel clock from modulo-5 clock.
2021-04-26 19:09:32 +02:00
Bruno Levy
3265cd4f62
Implemented modes 640x480, 1024x768, 1280x1024
2021-04-26 16:44:18 +02:00
Bruno Levy
2a1df3c714
Clean, parameterize
2021-04-26 16:30:57 +02:00
Bruno Levy
b11cf1aa28
Simplify
2021-04-26 16:27:10 +02:00
Bruno Levy
2f74f966a3
* HDMI_test: Added hires version (WIP)
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* exec.c,commander.c,femtosoc.v: cleanup
2021-04-26 15:52:17 +02:00
Bruno Levy
29a2002da7
* restructured basic examples by board
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* Added support for IceBreaker (WIP)
2021-04-07 22:10:51 +02:00
