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nand2tetris/projects/03/b/RAM512.hdl
2014-11-16 16:42:45 -08:00

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// This file is part of the materials accompanying the book
// "The Elements of Computing Systems" by Nisan and Schocken,
// MIT Press. Book site: www.idc.ac.il/tecs
// File name: projects/03/b/RAM512.hdl
/**
* Memory of 512 registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM512 {
IN in[16], load, address[9];
OUT out[16];
PARTS:
DMux8Way(in=load, sel=address[6..8],
a=ld0, b=ld1, c=ld2, d=ld3,
e=ld4, f=ld5, g=ld6, h=ld7);
RAM64(in=in, out=out0, load=ld0, address=address[0..5]);
RAM64(in=in, out=out1, load=ld1, address=address[0..5]);
RAM64(in=in, out=out2, load=ld2, address=address[0..5]);
RAM64(in=in, out=out3, load=ld3, address=address[0..5]);
RAM64(in=in, out=out4, load=ld4, address=address[0..5]);
RAM64(in=in, out=out5, load=ld5, address=address[0..5]);
RAM64(in=in, out=out6, load=ld6, address=address[0..5]);
RAM64(in=in, out=out7, load=ld7, address=address[0..5]);
Mux8Way16(a=out0, b=out1, c=out2, d=out3,
e=out4, f=out5, g=out6, h=out7,
sel=address[6..8], out=out);
}