Try switching to a 12MHz ADC clock as per recommendations in datasheet.

This commit is contained in:
cnlohr
2023-04-23 07:42:22 -04:00
parent 26e7f09090
commit d71ef5cef8
2 changed files with 34 additions and 7 deletions

View File

@@ -41,7 +41,7 @@ int PWM_MAXIMUM_DUTY = 48; //This is changed based on vdd.
// We can use Binary-shift IIR filters to filter the incoming ADC signals.
// See later in the code, but, it maps to only about 4 assembly instructions!
// (plus a read-back of the previous value we will be mixing).
#define ADC_IIR 1
#define ADC_IIR 2
#define VDD_IIR 3
// When we get a new vdd measurement, we can update our target_feedback value
@@ -242,7 +242,11 @@ static void SetupADC()
// Reset the ADC to init all regs
RCC->APB2PRSTR |= RCC_APB2Periph_ADC1;
RCC->APB2PRSTR &= ~RCC_APB2Periph_ADC1;
// ADCCLK = 12 MHz => RCC_ADCPRE = 0: divide by 4
RCC->CFGR0 &= ~RCC_ADCPRE; // Clear out the bis in case they were set
RCC->CFGR0 |= RCC_ADCPRE_DIV4; // set it to 010xx for /4.
// Set up single conversion on chl 7
ADC1->RSQR1 = 0;
ADC1->RSQR2 = 0;
@@ -252,8 +256,9 @@ static void SetupADC()
// group numbers is actually 4-group numbers.
ADC1->ISQR = 8 | (3<<20);
// Sampling time for channels. Careful: This has PID tuning implications
ADC1->SAMPTR2 = (4<<(3*7)) | (2<<(3*8));
// Sampling time for channels. Careful: This has PID tuning implications.
// Note to self: Consider retuning these for
ADC1->SAMPTR2 = (4<<(3*7)) | (3<<(3*8));
// 0:7 => 3/9/15/30/43/57/73/241 cycles
// (4 == 43 cycles), (6 = 73 cycles) Note these are alrady /2, so
// setting this to 73 cycles actually makes it wait 256 total cycles

View File

@@ -11,7 +11,7 @@ int targetnum = 0;
int lastsettarget = -1;
#define VOLTAGE_SCALE 2.01
const char * targdisp[] = { "F", " ", "0", "9", "8", "7", "6", "5", "4", "3", "2", "1", ".", "N" };
const char * targdisp[] = { "D", "F", " ", "0", "9", "8", "7", "6", "5", "4", "3", "2", "1", ".", "N" };
void HandleKey( int keycode, int bDown )
{
if( bDown )
@@ -32,6 +32,7 @@ void HandleKey( int keycode, int bDown )
case '-': case '_': targetnum = 11; break;
case '=': case '+': targetnum = 12; break;
case 'f': case 'F': targetnum = -1; break;
case 'd': case 'D': targetnum = -2; break;
}
}
}
@@ -133,10 +134,31 @@ int main()
int disp0 = 10-((fadegroup+1)%11);
int disp1 = 10-((fadegroup+0)%11);
rmask = (time1<<24)|(time0<<16)|(disp1<<12)|(disp0<<8)|0x43;
lastsettarget = targetnum;
}
else if( lastsettarget != targetnum )
{
rmask = 0x00000042 | (targetnum<<16);
if( targetnum == -2 )
{
static int fadeplace;
fadeplace+=1;
int fadegroup = (fadeplace)>>8;
int timeinfade = fadeplace&0xff;
int time0 = 60;
int time1 = 120;
int disp0 = 3;
int disp1 = 4;
rmask = (time1<<24)|(time0<<16)|(disp1<<12)|(disp0<<8)|0x43;
lastsettarget = targetnum;
}
else if( targetnum == -1 )
{
// Do nothing
}
else
{
rmask = 0x00000042 | (targetnum<<16);
}
lastsettarget = targetnum;
}
else
@@ -176,7 +198,7 @@ int main()
{
CNFGPenX = 200+x;
CNFGPenY = 1+y;
CNFGDrawText( targdisp[targetnum+1], 10 );
CNFGDrawText( targdisp[targetnum+2], 10 );
}
CNFGColor( BLUEGLOW );