Minor refactoring in FET symbol generator
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@@ -15,11 +15,11 @@ module.exports = (symbol, element) ->
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for k, v of groups
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k = k.toUpperCase()
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if k.match /^G/
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gate = v
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gate = v.map((e) => pins[e])
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else if k.match /^D/
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drain = v
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drain = v.map((e) => pins[e])
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else if k.match /^S/
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source = v
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source = v.map((e) => pins[e])
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else if k is '' # Root group
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continue
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else
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@@ -53,8 +53,7 @@ module.exports = (symbol, element) ->
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# Gate
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y = height/2
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for g in gate
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pin = pins[g]
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for pin in gate
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pin.x = -width/2 - pinLength
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pin.y = y
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pin.length = pinLength
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@@ -65,8 +64,7 @@ module.exports = (symbol, element) ->
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# Drain
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x = width/2
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for d in drain
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pin = pins[d]
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for pin in drain
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pin.x = x
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pin.y = -height/2 - pinLength
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pin.length = pinLength
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@@ -77,8 +75,7 @@ module.exports = (symbol, element) ->
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# Source
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x = width/2
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for s in source
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pin = pins[s]
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for pin in source
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pin.x = x
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pin.y = height/2 + pinLength
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pin.length = pinLength
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