Deal with DRC warnings by either ignoring (like courtyard overlap of
fiducials) or fixing (removing duplicate vias).
Also use a shorter route for SWDIO.
Signed-off-by: Stefan Agner <stefan@agner.ch>
updates
schematic:
-change usb current protection IC to 1.5A
-Added low-pass filter to the audio output
-PoE fixed primary windings polarity
-added option to select poe class with a jumper (between 3 and 4)
-fixes in poe design
-added testpoints
-added virtual hirose df40c connectors for pick and place use
lightblue.pretty:
-added fake DF40C footprint for pick and place and 3d model purposes
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
This makes sure that the origin aligns with the top left corner of the
board when importing the PCB using FreeCAD KiCadStepUp.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Add multiple ventilation slots (move some traces for space)
- Add Home Assistant logo to the back
- Add Nabu Casa logo on the front
- Fixup reference designators placement in several cases
Signed-off-by: Stefan Agner <stefan@agner.ch>
Order some relevant reference designator. Use JP for all jumpers. Place
silkcreen neatly. Add some custom silk screen. Remove heat sink corner
marks on silk screen.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Changes:
Footrints:
-Modified DC Jack to accomodate CUI PJ-002A
-Modified RJ45 to increase clearance between shield and poe pins
-Modified m.2 mounting pads to avoid drc errors
Schematic:
-usb-c facing usb mux is supplied by +3v3VP
-added misc. capacitors
PCB
-min. annular ring for vias set to 0.125 from 0.2
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
Use JLC7628 impedance values to get more options in color selection.
Also this leads to slightly wider traces typically, and it will be
easier to switch back to JLC2313 or the like than the other way around.
Also swap placing of HDMI/SW2 and rotate the heatsink by 90° for easier
routing.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Use minimal track width/gap of 0.127mm. Use impedance calculated using
the JLCPCB calculator for the 85Ohm/90Ohm differential pairs and 50Ohm
single trace.
For the 100Ohm pair the JLCPCB calculator does not allow to specify a
track gap which leads to a track width of 0.127mm or bigger. Hence for
this I used https://www.mantaro.com/resources/impedance-calculator.htm
(with Er 4.05, h 0.095, t 0.035).
Also use vias of 0.45/0.2mm by default.
Fixes: #6
Signed-off-by: Stefan Agner <stefan@agner.ch>
Improve/fix most silk screen placement of most parts. Decrease size to
0.8mm by 0.8mm and 0.15mm thickness which works for most PCB manufacturers.
Signed-off-by: Stefan Agner <stefan@agner.ch>
changes:
-more routing
-added poe negotiation disabled when +12V is present on the DC jack
-modified m.2 "holes"
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
- Moved PoE to a seperate sheet and finished design
- Started using Config field for Variants and DNP flag
- Fix-ups
- Added Wurth 749119550 and TI TPS23734 to the symbol library
- Changed RTC from PCF8563 to PCF85063
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added sdcard sheet and SD bus
-changed main i2c bus
-added 1.8V and 3.3V connection to CM4
-removed clk32 from led driver
-fixed PCM interface Data pin
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added AP64501SP-13 library symbol
-Initial power supplies schematics
-Increased capacitance for PCIe socket
-Connections between sheets
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added net classes for controlled impedance traces
-Added power hierarchical sheet
-Initial USB subsystem schematic
-Added multiple bus definitions (usb, pcie, i2c etc.)
-Fixed busses use
-Added LDO for audio analog rails
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
