The Rohm has a lower current rating and input voltage range, but should
be good enough for our use case. It has better availability and is quite
a bit cheaper than the Diodes part. This also requires different
inductors and some different resistor values.
Fixes: #12
Signed-off-by: Stefan Agner <stefan@agner.ch>
Use a jumper instead of a switch to change between CM4 USB Device and
CP2102N. Replace CP2102N QFN24 with QFN20 variant. Make CP2102N to be
bus-powered by default.
Fixes: #7
Signed-off-by: Stefan Agner <stefan@agner.ch>
Use a through hole 3.5mm Audio jack to make sure it does nto get teared
off the board accidentially that easily.
Fixes: #9
Signed-off-by: Stefan Agner <stefan@agner.ch>
Make sure those signals are well defined even when not be driven from
the CM4 side. Also rename Radio.BOOT to Radio.~BOOT since its a low
active signal.
Fixes: #10
Signed-off-by: Stefan Agner <stefan@agner.ch>
CRFILT capacitor is required for the chip to start properly
and 10k pull-downs were too strong according to the datasheet.
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
Use the correct footprint for the PoE bulk capacitor C80. The TI
evaluation module circuit uses a Panasonic EEE-FK1J470P bulk capacitor.
The series has other better suited alternatives like EEE-HA1J470UP, but
the F-size code seems to be a sensible choice.
Fixes: #1
Signed-off-by: Stefan Agner <stefan@agner.ch>
Add the CM4 board to board connectors using separate symbols. This is a
bit a hack, but makes sure two pieces appear in the BOM.
Also, this seems to upgrade all the schematic to the latest KiCad
schematic version.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Make sure the right path to 3D models is set in various footprints on
the PCB. Assign the M.2 footprint from our 3D library.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Improve/fix most silk screen placement of most parts. Decrease size to
0.8mm by 0.8mm and 0.15mm thickness which works for most PCB manufacturers.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Moved R1 to outside of CM4 courtyard
- Matched all diff. pairs skew
- Increased length of the SD_CLK above all other sd traces
- few trace fixups
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
Make sure the courtyards is defined such only the zones which are
relevant for regular component placing are excluded.
Signed-off-by: Stefan Agner <stefan@agner.ch>
changes:
-more routing
-added poe negotiation disabled when +12V is present on the DC jack
-modified m.2 "holes"
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
The 1- at the start of the part number denotes M-Key which is a rather
important distinction. Fix the footprint name.
Signed-off-by: Stefan Agner <stefan@agner.ch>
We don't plan to populate those connectors by default. The through-hole
ones are easier to solder by hand on a populated PCB.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Add repository with 3D models as git submodule to the repository and
reference our footprints to the matching 3D models.
Signed-off-by: Stefan Agner <stefan@agner.ch>
