Dominik Sliwa 97ccf562ec PCB changes ...

- Moved R1 to outside of CM4 courtyard
- Matched all diff. pairs skew
- Increased length of the SD_CLK above all other sd traces
- few trace fixups

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>

2021-02-09 18:43:10 +01:00

LightBlue.3dshapes @ 28edf3578e

Define 3D models and offsets for KiCad footprints

2021-02-02 17:02:36 +01:00

LightBlue.pretty

Fix RJ45 connector footprint

2021-02-09 17:48:00 +01:00

.DS_Store

[WIP] PCB commit

2021-02-02 12:20:08 +01:00

.gitattributes

setup gitattibutes

2021-01-17 11:02:12 +01:00

.gitignore

Initial commit

2021-01-12 20:03:39 +01:00

.gitmodules

[WIP] PCB commit

2021-02-02 12:20:08 +01:00

Audio.kicad_sch

Update Schematic to latest KiCad nightly

2021-01-26 21:57:04 +01:00

CM4.kicad_sch

PCB[WIP]/SCH:

2021-02-09 10:50:55 +01:00

Ethernet.kicad_sch

PCB[WIP]: finished routing

2021-02-09 14:48:48 +01:00

fp-lib-table

Initial commit

2021-01-12 20:03:39 +01:00

FrontRTC.kicad_sch

[WIP] PCB commit

2021-02-02 12:20:08 +01:00

LightBlue.kicad_pcb

PCB changes

2021-02-09 18:43:10 +01:00

LightBlue.kicad_prl

PCB changes

2021-02-09 18:43:10 +01:00

LightBlue.kicad_pro

PCB[WIP]: finished routing

2021-02-09 14:48:48 +01:00

LightBlue.kicad_sch

PCB[WIP]/SCH:

2021-02-09 10:50:55 +01:00

LightBlue.kicad_sym

PCB[WIP]/SCH:

2021-02-09 10:50:55 +01:00

PCIe.kicad_sch

Properly name footprint according to part name

2021-02-02 16:52:50 +01:00

poe.kicad_sch

PCB[WIP]/SCH:

2021-02-09 10:50:55 +01:00

Power.kicad_sch

PCB[WIP]/SCH:

2021-02-09 10:50:55 +01:00

Radio.kicad_sch

Use through-hole connectors for SiLabs Debug/GPIO pin-header

2021-02-02 14:28:44 +01:00

sdcard.kicad_sch

[WIP] PCB commit

2021-02-02 12:20:08 +01:00

sym-lib-table

Initial commit

2021-01-12 20:03:39 +01:00

USB.kicad_sch

PCB[WIP]/SCH:

2021-02-09 10:50:55 +01:00

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KiCad Schematic 100%