Commit Graph

27 Commits

Author SHA1 Message Date
Dominik Sliwa
b1e3c7e17c pcb 0.2:
Changes:
Footrints:
-Modified DC Jack to accomodate CUI PJ-002A
-Modified RJ45 to increase clearance between shield and poe pins
-Modified m.2 mounting pads to avoid drc errors
Schematic:
-usb-c facing usb mux is supplied by +3v3VP
-added misc. capacitors
PCB
-min. annular ring for vias set to 0.125 from 0.2

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-04-27 02:06:11 +02:00
Stefan Agner
c7340505c8 Use impedance for JLC7628 stackup/switch HDMI/SW2 placement
Use JLC7628 impedance values to get more options in color selection.
Also this leads to slightly wider traces typically, and it will be
easier to switch back to JLC2313 or the like than the other way around.

Also swap placing of HDMI/SW2 and rotate the heatsink by 90° for easier
routing.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-23 15:45:21 +02:00
Stefan Agner
07570784f5 Update board setup
Use minimal track width/gap of 0.127mm. Use impedance calculated using
the JLCPCB calculator for the 85Ohm/90Ohm differential pairs and 50Ohm
single trace.

For the 100Ohm pair the JLCPCB calculator does not allow to specify a
track gap which leads to a track width of 0.127mm or bigger. Hence for
this I used https://www.mantaro.com/resources/impedance-calculator.htm
(with Er 4.05, h 0.095, t 0.035).

Also use vias of 0.45/0.2mm by default.

Fixes: #6
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-22 17:26:42 +02:00
Stefan Agner
20c5478ac6 Assign footprints and annotate components
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-04-13 15:15:40 +02:00
Stefan Agner
2805e3549c Import fixes footprints and some additional silk screen fixes
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-02-09 21:01:00 +01:00
Stefan Agner
c567ca45fe Fix silk screen placements
Improve/fix most silk screen placement of most parts. Decrease size to
0.8mm by 0.8mm and 0.15mm thickness which works for most PCB manufacturers.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-02-09 20:22:32 +01:00
Stefan Agner
2de3d1b348 Use Board Design Rules suitable for Aisler
Bump edge to copper distance to 0.3mm. Fix a problematic via.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-02-09 19:26:40 +01:00
Stefan Agner
eeddd4bbfd Change connector reference designators
Make them ordered logically, based importance and placement on the
board.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-02-09 19:01:10 +01:00
Dominik Sliwa
d248c69c8e PCB[WIP]: finished routing
TODO
- length matching
- review
- silkscreen

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-02-09 14:48:48 +01:00
Dominik Sliwa
66c3a4b488 PCB[WIP]/SCH:
changes:
-more routing
-added poe negotiation disabled when +12V is present on the DC jack
-modified m.2 "holes"

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-02-09 10:50:55 +01:00
Dominik Sliwa
3e38fcc591 [WIP] PCB commit
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-02-02 12:20:08 +01:00
Stefan Agner
267d868b40 Update Schematic to latest KiCad nightly
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-01-26 21:57:04 +01:00
Stefan Agner
7d374ecae8 Define more footprints and update Manufacturer/PartNumber fields
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-01-25 17:10:39 +01:00
Stefan Agner
3f47379b79 Update Manufacturer/PartNumber accross the whole schema
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-01-24 22:37:19 +01:00
Dominik Sliwa
6d866df43d PoE and clean-up
- Moved PoE to a seperate sheet and finished design
- Started using Config field for Variants and DNP flag
- Fix-ups
- Added Wurth 749119550 and TI TPS23734 to the symbol library
- Changed RTC from PCF8563 to PCF85063

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-01-24 13:55:45 +01:00
Dominik Sliwa
718cc2ad0c -Connected remaining nets
-CM4 symbol fixups
-Used single 6x OE buffer chip instead of 4x single
-Added PWM FAN

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-01-18 20:38:35 +01:00
Stefan Agner
272eedbb65 Add UART for Zigbee and wire up control signals 2021-01-17 14:16:17 +01:00
Dominik Sliwa
7cefabc116 Changes
-Added sdcard sheet and SD bus
    -changed main i2c bus
    -added 1.8V and 3.3V connection to CM4
    -removed clk32 from led driver
    -fixed PCM interface Data pin

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-01-17 11:41:05 +01:00
Dominik Sliwa
64c4bfad35 Changes:
-Added AP64501SP-13 library symbol
    -Initial power supplies schematics
    -Increased capacitance for PCIe socket
    -Connections between sheets

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-01-16 22:24:22 +01:00
Dominik Sliwa
ad4cc7b761 Multiple changes in schematic & projects:
-Added net classes for controlled impedance traces
    -Added power hierarchical sheet
    -Initial USB subsystem schematic
    -Added multiple bus definitions (usb, pcie, i2c etc.)
    -Fixed busses use
    -Added LDO for audio analog rails

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
2021-01-16 19:45:50 +01:00
Stefan Agner
2a58cdd3a6 Add sheet for front/RTC, add buttons, LEDs and a RGB LED 2021-01-16 02:17:33 +01:00
Stefan Agner
c1077c7e1e Add PCIe M.2 support 2021-01-14 17:49:44 +01:00
Stefan Agner
a7690180a2 Add Ethernet plug symbol and footprint 2021-01-14 00:35:00 +01:00
Stefan Agner
6925cd5c72 Add sheet for audio 2021-01-13 17:05:08 +01:00
Stefan Agner
5340feaf38 Add Silicon Labs MGM210P symbol and footprint 2021-01-13 16:07:28 +01:00
Stefan Agner
0fe13d846c Add symbols to schematics, add Symbol for stacked USB 2.0 connector 2021-01-12 23:28:07 +01:00
Stefan Agner
74e3c29152 Initial commit
Project creation, imported Compute Module 4 symbol and footprint from
Gitlab merge requests:
https://gitlab.com/kicad/libraries/kicad-symbols/-/merge_requests/3158
https://gitlab.com/kicad/libraries/kicad-footprints/-/merge_requests/2562
2021-01-12 20:03:39 +01:00