16-bit increment
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9
Makefile
9
Makefile
@@ -1,6 +1,15 @@
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clean:
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-rm *.vcd *.vvp
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inc16_tb: inc16_tb.vcd
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gtkwave inc16_tb.vcd &
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inc16_tb.vcd: inc16_tb.vvp
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vvp inc16_tb.vvp
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inc16_tb.vvp: inc16.v inc16_tb.v
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iverilog -o inc16_tb.vvp inc16_tb.v
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add16_tb: add16_tb.vcd
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gtkwave add16_tb.vcd &
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21
inc16.v
Normal file
21
inc16.v
Normal file
@@ -0,0 +1,21 @@
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`ifndef _inc16_v
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`define _inc16_v
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`include "halfadder.v"
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module Inc16 (input [15:0] in, output [15:0] out);
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wire [16:1] c;
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genvar i;
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generate
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for (i=0; i<16; i=i+1)
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begin
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if (i==0)
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HalfAdder u1 (.a(in[i]), .b(1'b1), .sum(out[i]), .carry(c[i+1]));
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else
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HalfAdder u1 (.a(in[i]), .b(c[i]), .sum(out[i]), .carry(c[i+1]));
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end
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endgenerate
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endmodule
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`endif
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20
inc16_tb.v
Normal file
20
inc16_tb.v
Normal file
@@ -0,0 +1,20 @@
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`include "inc16.v"
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module Inc16_test;
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reg [15:0] in;
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wire [15:0] out;
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integer i;
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initial begin
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$dumpfile("inc16_tb.vcd");
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$dumpvars;
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in=123;
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#1;
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in=16'h7F;
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#1;
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$finish();
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end
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Inc16 u1(.in(in), .out(out));
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endmodule
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