Files
nand2tetris_verilog/Makefile
2024-06-17 10:11:07 -07:00

237 lines
4.3 KiB
Makefile

clean:
-rm *.vcd *.vvp
bit_tb: bit_tb.vcd
gtkwave bit_tb.vcd &
bit_tb.vcd: bit_tb.vvp
vvp bit_tb.vvp
bit_tb.vvp: bit.v bit_tb.v
iverilog -o bit_tb.vvp bit_tb.v
dff_tb: dff_tb.vcd
gtkwave dff_tb.vcd &
dff_tb.vcd: dff_tb.vvp
vvp dff_tb.vvp
dff_tb.vvp: dff.v dff_tb.v
iverilog -o dff_tb.vvp dff_tb.v
alu_tb: alu_tb.vcd
gtkwave alu_tb.vcd &
alu_tb.vcd: alu_tb.vvp
vvp alu_tb.vvp
alu_tb.vvp: alu.v alu_tb.v
iverilog -o alu_tb.vvp alu_tb.v
inc16_tb: inc16_tb.vcd
gtkwave inc16_tb.vcd &
inc16_tb.vcd: inc16_tb.vvp
vvp inc16_tb.vvp
inc16_tb.vvp: inc16.v inc16_tb.v
iverilog -o inc16_tb.vvp inc16_tb.v
add16_tb: add16_tb.vcd
gtkwave add16_tb.vcd &
add16_tb.vcd: add16_tb.vvp
vvp add16_tb.vvp
add16_tb.vvp: add16.v add16_tb.v
iverilog -o add16_tb.vvp add16_tb.v
fulladder_tb: fulladder_tb.vcd
gtkwave fulladder_tb.vcd &
fulladder_tb.vcd: fulladder_tb.vvp
vvp fulladder_tb.vvp
fulladder_tb.vvp: fulladder.v fulladder_tb.v
iverilog -o fulladder_tb.vvp fulladder_tb.v
halfadder_tb: halfadder_tb.vcd
gtkwave halfadder_tb.vcd &
halfadder_tb.vcd: halfadder_tb.vvp
vvp halfadder_tb.vvp
halfadder_tb.vvp: halfadder.v halfadder_tb.v
iverilog -o halfadder_tb.vvp halfadder_tb.v
dmux8way_tb: dmux8way_tb.vcd
gtkwave dmux8way_tb.vcd &
dmux8way_tb.vcd: dmux8way_tb.vvp
vvp dmux8way_tb.vvp
dmux8way_tb.vvp: dmux8way.v dmux8way_tb.v
iverilog -o dmux8way_tb.vvp dmux8way_tb.v
dmux4way_tb: dmux4way_tb.vcd
gtkwave dmux4way_tb.vcd &
dmux4way_tb.vcd: dmux4way_tb.vvp
vvp dmux4way_tb.vvp
dmux4way_tb.vvp: dmux4way.v dmux4way_tb.v
iverilog -o dmux4way_tb.vvp dmux4way_tb.v
mux8way16_tb: mux8way16_tb.vcd
gtkwave mux8way16_tb.vcd &
mux8way16_tb.vcd: mux8way16_tb.vvp
vvp mux8way16_tb.vvp
mux8way16_tb.vvp: mux8way16.v mux8way16_tb.v
iverilog -o mux8way16_tb.vvp mux8way16_tb.v
mux8way_tb: mux8way_tb.vcd
gtkwave mux8way_tb.vcd &
mux8way_tb.vcd: mux8way_tb.vvp
vvp mux8way_tb.vvp
mux8way_tb.vvp: mux8way.v mux8way_tb.v
iverilog -o mux8way_tb.vvp mux8way_tb.v
mux4way16_tb: mux4way16_tb.vcd
gtkwave mux4way16_tb.vcd &
mux4way16_tb.vcd: mux4way16_tb.vvp
vvp mux4way16_tb.vvp
mux4way16_tb.vvp: mux4way16.v mux4way16_tb.v
iverilog -o mux4way16_tb.vvp mux4way16_tb.v
mux4way_tb: mux4way_tb.vcd
gtkwave mux4way_tb.vcd &
mux4way_tb.vcd: mux4way_tb.vvp
vvp mux4way_tb.vvp
mux4way_tb.vvp: mux4way.v mux4way_tb.v
iverilog -o mux4way_tb.vvp mux4way_tb.v
or8way_tb: or8way_tb.vcd
gtkwave or8way_tb.vcd &
or8way_tb.vcd: or8way_tb.vvp
vvp or8way_tb.vvp
or8way_tb.vvp: or8way.v or8way_tb.v
iverilog -o or8way_tb.vvp or8way_tb.v
mux16_tb: mux16_tb.vcd
gtkwave mux16_tb.vcd &
mux16_tb.vcd: mux16_tb.vvp
vvp mux16_tb.vvp
mux16_tb.vvp: mux16.v mux16_tb.v
iverilog -o mux16_tb.vvp mux16_tb.v
or16_tb: or16_tb.vcd
gtkwave or16_tb.vcd &
or16_tb.vcd: or16_tb.vvp
vvp or16_tb.vvp
or16_tb.vvp: or16.v or16_tb.v
iverilog -o or16_tb.vvp or16_tb.v
and16_tb: and16_tb.vcd
gtkwave and16_tb.vcd &
and16_tb.vcd: and16_tb.vvp
vvp and16_tb.vvp
and16_tb.vvp: and16.v and16_tb.v
iverilog -o and16_tb.vvp and16_tb.v
not16_tb: not16_tb.vcd
gtkwave not16_tb.vcd &
not16_tb.vcd: not16_tb.vvp
vvp not16_tb.vvp
not16_tb.vvp: not16.v not16_tb.v
iverilog -o not16_tb.vvp not16_tb.v
dmux_tb: dmux_tb.vcd
gtkwave dmux_tb.vcd &
dmux_tb.vcd: dmux_tb.vvp
vvp dmux_tb.vvp
dmux_tb.vvp: dmux.v dmux_tb.v
iverilog -o dmux_tb.vvp dmux_tb.v
mux_tb: mux_tb.vcd
gtkwave mux_tb.vcd &
mux_tb.vcd: mux_tb.vvp
vvp mux_tb.vvp
mux_tb.vvp: mux.v mux_tb.v
iverilog -o mux_tb.vvp mux_tb.v
xor_tb: xor_tb.vcd
gtkwave xor_tb.vcd &
xor_tb.vcd: xor_tb.vvp
vvp xor_tb.vvp
xor_tb.vvp: xor.v xor_tb.v
iverilog -o xor_tb.vvp xor_tb.v
nor_tb: nor_tb.vcd
gtkwave nor_tb.vcd &
nor_tb.vcd: nor_tb.vvp
vvp nor_tb.vvp
nor_tb.vvp: nor.v nor_tb.v
iverilog -o nor_tb.vvp nor_tb.v
or_tb: or_tb.vcd
gtkwave or_tb.vcd &
or_tb.vcd: or_tb.vvp
vvp or_tb.vvp
or_tb.vvp: or.v or_tb.v
iverilog -o or_tb.vvp or_tb.v
and_tb: and_tb.vcd
gtkwave and_tb.vcd &
and_tb.vcd: and_tb.vvp
vvp and_tb.vvp
and_tb.vvp: and.v and_tb.v
iverilog -o and_tb.vvp and_tb.v
not_tb: not_tb.vcd
gtkwave not_tb.vcd &
not_tb.vcd: not_tb.vvp
vvp not_tb.vvp
not_tb.vvp: not.v not_tb.v
iverilog -o not_tb.vvp not_tb.v
nand_tb: nand_tb.vcd
gtkwave nand_tb.vcd &
nand_tb.vcd: nand_tb.vvp
vvp nand_tb.vvp
nand_tb.vvp: nand.v nand_tb.v
iverilog -o nand_tb.vvp nand_tb.v