[WIP] PCB design

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Done:
PoE - primary side,
DCDC location,
USB hub location,

TBD:
HUB routing,
PoE sec. side,
Audio

Signed-off-by: Dominik Sliwa <dominik@sliwa.io>

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Dominik Sliwa

2021-08-24 01:13:22 +02:00

parent fe1b207586

commit d70d55928a

1 changed files with 31538 additions and 32199 deletions

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Amber.kicad_pcb

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