Various BOM adjustments, most notably setting/correcting manufacturer
and part number information for D22, D30, FL1, L4 and L5.
Signed-off-by: Stefan Agner <stefan@agner.ch>
-eth shield is not connected to the GND rather it shields "input" of poe
-used smaller package for bulk PoE capacitor
-Changed common mode filter to Pulse T8113
-Added more inductor filters on the primary side
-replaced secondary side ferrite silter with an inductor
-used distributed "flyback" capacitor (3 instead of 1)
-slightly increased distance between the poe transformer and the
ethernet signal traces
- extended GND1 under the transformer
- primary snubber circuit is now in "hot-loop" area
-repositioned poe enable optocoupler
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
Increment to sub-version v1.2. Main changes are:
- Back and front silk screen
- LED resistors
There are no changes in the layout and any critical components.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Fix edge cut on lower right corner to make board size exact
- Update board charactristics
- Set grid origin back to 30, 30
- Update M.2 expansion silk screen (remove AI accelerator hint)
- Various silk screen reference designator fixes/improvements
- Add ESD warning logo
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Update silk screen reference designators
- Update backside silk screen for Yellow revision 1.1
- Set U21 (SOIC-8 RTC) to assemble and U25 (MSOP-8) as DNP
- Update heatsink footprint to add heatsink outline to silk screen (#44)
- Mark orientation of D26, D27, D28 and D29 (fixes#39)
- Use pin-header footprint for PoE selector J13, it is now JP5
Signed-off-by: Stefan Agner <stefan@agner.ch>
Run annotation again which just updated some net names. Address various
DRC issues like courtyard violence and exclude the remaining DRC errors.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Update PCB from Schematics
- Move SD-card to bottom side of the PCB
- Place LEDs in front of CM4
- Add additional LEDs (Amber/Radio)
- Move LP5569 to the left
- Remove all holes
- Lock through holes which should not be moved
Fixes: #33
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Add Blue Radio LED (in a separate new assembly option)
- Change buffer package from SC-70 to SC-74A (aka. SOT-23-5)
- Add GND test point
Fixes: #31
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Add multiple ventilation slots (move some traces for space)
- Add Home Assistant logo to the back
- Add Nabu Casa logo on the front
- Fixup reference designators placement in several cases
Signed-off-by: Stefan Agner <stefan@agner.ch>
Order some relevant reference designator. Use JP for all jumpers. Place
silkcreen neatly. Add some custom silk screen. Remove heat sink corner
marks on silk screen.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Use JLC7628 impedance values to get more options in color selection.
Also this leads to slightly wider traces typically, and it will be
easier to switch back to JLC2313 or the like than the other way around.
Also swap placing of HDMI/SW2 and rotate the heatsink by 90° for easier
routing.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Adjust some high level placement like M.2 or CM4 and heatsink. Remove
all traces and vias since most of the layouting has to be redone
anyways.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Use Diodes B2100-13-F consistently
- Define part for pin headers
- Replace N-Channel MOSFET for PoE with BSZ440N10NS3GATMA1
- Define Input protection MOSFET DMP3013SFV-7
Signed-off-by: Stefan Agner <stefan@agner.ch>
Add the CM4 board to board connectors using separate symbols. This is a
bit a hack, but makes sure two pieces appear in the BOM.
Also, this seems to upgrade all the schematic to the latest KiCad
schematic version.
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Fix footprint for 02x05 pin header
- Add footprint for Bourns SDR1006 Inductor (PoE)
- Define footprints for inductors
- Define footprints for ferrite beads
- Define footprint for fuse
- Define footprints for all resistors
- Define footprints for SD card and other components
- Switch ON Semi NCP114MX with TI TLV73333PDBV
Signed-off-by: Stefan Agner <stefan@agner.ch>
- Moved PoE to a seperate sheet and finished design
- Started using Config field for Variants and DNP flag
- Fix-ups
- Added Wurth 749119550 and TI TPS23734 to the symbol library
- Changed RTC from PCF8563 to PCF85063
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added AP64501SP-13 library symbol
-Initial power supplies schematics
-Increased capacitance for PCIe socket
-Connections between sheets
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
-Added net classes for controlled impedance traces
-Added power hierarchical sheet
-Initial USB subsystem schematic
-Added multiple bus definitions (usb, pcie, i2c etc.)
-Fixed busses use
-Added LDO for audio analog rails
Signed-off-by: Dominik Sliwa <dominik@sliwa.io>
