This commit is contained in:
2025-08-19 08:17:41 -07:00
parent 53563a2c93
commit 5fd2a484e5

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@@ -1,6 +1,6 @@
`default_nettype none
`include "../verilog-6502/ALU.v"
`include "../verilog-6502/cpu.v"
//`include "../verilog-6502/ALU.v"
//`include "../verilog-6502/cpu.v"
// look in pins.pcf for all the pin names on the TinyFPGA BX board
module cputest (CLK, LED, USBPU);