4-to-1 mux

Makefile

@@ -1,6 +1,15 @@
 clean:
 	-rm *.vcd *.vvp
 
+mux4way_tb: mux4way_tb.vcd
+	gtkwave mux4way_tb.vcd &
+
+mux4way_tb.vcd: mux4way_tb.vvp
+	vvp mux4way_tb.vvp
+
+mux4way_tb.vvp: mux4way.v mux4way_tb.v
+	iverilog -o mux4way_tb.vvp mux4way_tb.v
+
 or8way_tb: or8way_tb.vcd
 	gtkwave or8way_tb.vcd &
 

mux4way.v

@@ -0,0 +1,14 @@
+`ifndef _mux4way_v
+`define _mux4way_v
+
+`include "mux.v"
+
+module Mux4Way (input a, input b, input c, input d, input [1:0] sel, output out);
+    wire tmp0, tmp1;
+
+    Mux u1(.a(a), .b(b), .sel(sel[0]), .out(tmp0));
+    Mux u2(.a(c), .b(d), .sel(sel[0]), .out(tmp1));
+    Mux u3(.a(tmp0), .b(tmp1), .sel(sel[1]), .out(out));
+endmodule
+
+`endif

mux4way_tb.v

@@ -0,0 +1,26 @@
+`include "mux4way.v"
+
+module Mux4Way_test;
+    reg a, b, c, d;
+    reg [1:0] sel;
+    wire out;
+
+    integer i;
+
+    initial begin
+        $dumpfile("mux4way_tb.vcd");
+        $dumpvars;
+        for (i=0; i<64; i=i+1)
+        begin
+            sel=(i&48)>>4;
+            d=(i&8)>>3;
+            c=(i&4)>>2;
+            b=(i&2)>>1;
+            a=i&1;
+            #1;
+        end
+        $finish();
+    end
+
+    Mux4Way u1(.a(a), .b(b), .c(c), .d(d), .sel(sel), .out(out));
+endmodule