8-to-1 mux

This commit is contained in:
2024-06-13 17:52:12 -07:00
parent 24afea91ca
commit 2e3c6ee9b1
3 changed files with 54 additions and 0 deletions

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clean:
-rm *.vcd *.vvp
mux8way_tb: mux8way_tb.vcd
gtkwave mux8way_tb.vcd &
mux8way_tb.vcd: mux8way_tb.vvp
vvp mux8way_tb.vvp
mux8way_tb.vvp: mux8way.v mux8way_tb.v
iverilog -o mux8way_tb.vvp mux8way_tb.v
mux4way_tb: mux4way_tb.vcd
gtkwave mux4way_tb.vcd &

15
mux8way.v Normal file
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`ifndef _mux8way_v
`define _mux8way_v
`include "mux4way.v"
`include "mux.v"
module Mux8Way (input a, input b, input c, input d, input e, input f, input g, input h, input [2:0] sel, output out);
wire tmp0, tmp1;
Mux4Way u1(.a(a), .b(b), .c(c), .d(d), .sel(sel[1:0]), .out(tmp0));
Mux4Way u2(.a(e), .b(f), .c(g), .d(h), .sel(sel[1:0]), .out(tmp1));
Mux u3(.a(tmp0), .b(tmp1), .sel(sel[2]), .out(out));
endmodule
`endif

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mux8way_tb.v Normal file
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`include "mux8way.v"
module Mux8Way_test;
reg a, b, c, d, e, f, g, h;
reg [2:0] sel;
wire out;
integer i;
initial begin
$dumpfile("mux8way_tb.vcd");
$dumpvars;
for (i=0; i<2048; i=i+1)
begin
sel=(i&1792)>>8;
h=(i&128)>>7;
g=(i&64)>>6;
f=(i&32)>>5;
e=(i&16)>>4;
d=(i&8)>>3;
c=(i&4)>>2;
b=(i&2)>>1;
a=i&1;
#1;
end
$finish();
end
Mux8Way u1(.a(a), .b(b), .c(c), .d(d), .e(e), .f(f), .g(g), .h(h), .sel(sel), .out(out));
endmodule