half and full adders

Makefile

@@ -1,6 +1,24 @@
 clean:
 	-rm *.vcd *.vvp
 
+fulladder_tb: fulladder_tb.vcd
+	gtkwave fulladder_tb.vcd &
+
+fulladder_tb.vcd: fulladder_tb.vvp
+	vvp fulladder_tb.vvp
+
+fulladder_tb.vvp: fulladder.v fulladder_tb.v
+	iverilog -o fulladder_tb.vvp fulladder_tb.v
+
+halfadder_tb: halfadder_tb.vcd
+	gtkwave halfadder_tb.vcd &
+
+halfadder_tb.vcd: halfadder_tb.vvp
+	vvp halfadder_tb.vvp
+
+halfadder_tb.vvp: halfadder.v halfadder_tb.v
+	iverilog -o halfadder_tb.vvp halfadder_tb.v
+
 dmux8way_tb: dmux8way_tb.vcd
 	gtkwave dmux8way_tb.vcd &
 

fulladder.v

@@ -0,0 +1,15 @@
+`ifndef _fulladder_v
+`define _fulladder_v
+
+`include "halfadder.v"
+`include "or.v"
+
+module FullAdder (input a, input b, input c, output sum, output carry);
+    wire halfsum, halfcarry1, halfcarry2;
+
+    HalfAdder u1 (.a(a), .b(b), .sum(halfsum), .carry(halfcarry1));
+    HalfAdder u2 (.a(halfsum), .b(c), .sum(sum), .carry(halfcarry2));
+    Or u3 (.a(halfcarry1), .b(halfcarry2), .out(carry));
+endmodule
+
+`endif

fulladder_tb.v

@@ -0,0 +1,23 @@
+`include "fulladder.v"
+
+module FullAdder_test;
+    reg a, b, c;
+    wire [1:0] sum;
+
+    integer i;
+
+    initial begin
+        $dumpfile("fulladder_tb.vcd");
+        $dumpvars;
+        for (i=0; i<8; i=i+1)
+        begin
+            c=(i&4)>>2;
+            b=(i&2)>>1;
+            a=i&1;
+            #1;
+        end
+        $finish();
+    end
+
+    FullAdder u1(.a(a), .b(b), .c(c), .sum(sum[0]), .carry(sum[1]));
+endmodule

halfadder.v

@@ -0,0 +1,12 @@
+`ifndef _halfadder_v
+`define _halfadder_v
+
+`include "and.v"
+`include "xor.v"
+
+module HalfAdder (input a, input b, output sum, output carry);
+    Xor u1 (.a(a), .b(b), .out(sum));
+    And u2 (.a(a), .b(b), .out(carry));
+endmodule
+
+`endif

halfadder_tb.v

@@ -0,0 +1,22 @@
+`include "halfadder.v"
+
+module HalfAdder_test;
+    reg a, b;
+    wire [1:0] sum;
+
+    integer i;
+
+    initial begin
+        $dumpfile("halfadder_tb.vcd");
+        $dumpvars;
+        for (i=0; i<4; i=i+1)
+        begin
+            b=(i&2)>>1;
+            a=i&1;
+            #1;
+        end
+        $finish();
+    end
+
+    HalfAdder u1(.a(a), .b(b), .sum(sum[0]), .carry(sum[1]));
+endmodule